74AUP1T58 NXP [NXP Semiconductors], 74AUP1T58 Datasheet - Page 4

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74AUP1T58

Manufacturer Part Number
74AUP1T58
Description
Low-power configurable gate with voltage-level translator
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
Table 5.
74AUP1T58_2
Product data sheet
Logic function
2-input NAND
2-input NAND with both inputs inverted
2-input AND with inverted input
2-input NOR with inverted input
2-input OR
2-input OR with both inputs inverted
2-input XOR
Buffer
Inverter
Fig 5.
Fig 7.
Fig 9.
2-input NAND gate or 2-input OR gate with
both inputs inverted
2-input AND gate with input C inverted or
2-input NOR gate with inverted A input
2-input XOR gate
C
C
C
C
C
B
B
A
A
B
Function selection table
7.1 Logic configurations
Y
Y
Y
Y
Y
B
B
A
1
2
3
1
2
3
1
2
3
6
5
4
001aab688
6
5
4
001aab690
6
5
4
001aab692
C
Y
C
Y
C
Y
V
V
V
Rev. 02 — 29 September 2009
CC
CC
CC
Low-power configurable gate with voltage-level translator
Figure
see
see
see
see
see
see
see
see
see
Fig 6.
Fig 8.
Fig 10. Buffer
Figure 5
Figure 8
Figure 6
Figure 6
Figure 8
Figure 5
Figure 9
Figure 10
Figure 11
2-input AND gate with input B inverted or
2-input NOR gate with inverted C input
2-input OR gate or 2-input NAND gate with
both inputs inverted
B
C
B
C
A
C
A
C
A
and
and
7
7
Y
Y
Y
Y
Y
A
B
A
74AUP1T58
1
2
3
1
2
3
1
2
3
6
5
4
001aab693
© NXP B.V. 2009. All rights reserved.
6
5
4
6
5
4
001aab689
001aab691
Y
C
Y
C
Y
V
V
V
CC
CC
CC
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