ADG731 AD [Analog Devices], ADG731 Datasheet - Page 5

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ADG731

Manufacturer Part Number
ADG731
Description
Manufacturer
AD [Analog Devices]
Datasheet

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TIMING CHARACTERISTICS
Parameter
t
t
t
t
t
t
t
t
NOTES
1
2
Specifications subject to change without notice.
REV. PrD
1
2
3
4
5
6
7
8
See Figure 1.
All input signals are specified with tr =tf = 5ns (10% to 90% of V
Figure 2. ADG725 Input Shift Register Contents
DB7 (MSB)
EN
SYNC
SCLK
DIN
Limit at T
33
13
13
13
40
5
4.5
33
CSA
CSB
t 8
DATA BITS
X
MIN
t 4
PRELIMINARY TECHNICAL DATA
A3
DB7
, T
MAX
t 5
A2
t 6
Figure 1. 3-Wire Serial Interface Timing Diagram.
DB0 (LSB)
A1
t 7
A0
1,2
t 2
DD
) and timed from a voltage level of (V
Units
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
t 1
t 3
–5–
DB0
Figure 3. ADG731 Input Shift Register Contents
SCLK Cycle time
Data Hold Time
Minimum
Conditions/Comments
SCLK High Time
SCLK Low Time
Minimum
Data Setup Time
DB7 (MSB)
EN
to SCLK falling edge setup time
IL
+ V
CS
IH
)/2.
X
DATA BITS
low time
high time
A4
A3
A2
DB0 (LSB)
A1
ADG725/ADG731
A0

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