HIP9020AP INTERSIL [Intersil Corporation], HIP9020AP Datasheet - Page 2

• Manufacturer Part Number: HIP9020AP
• Description: Programmable Quad Buffer with Pre and Post Scaler Dividers
• Manufacturer: INTERSIL [Intersil Corporation]

Programmable Quad Buffer Functional Block Diagram
(SPEED SENSOR INPUT)
PRSS-A
(POST SCALER INPUT)
0
0
0
0
1
1
1
POSI
SSI
CIRCLED NUMBERS ARE 20 LEAD SOP PACKAGE
10
4
5
PRSS-B
7
GND
0
0
1
1
0
0
1
LOGIC SELECT FOR INPUT (SSI) TO OUTPUT (VOX) DIV-BY NUMBER
VOLT. REG. &
LIMITER
CURRENT
1
SOURCE
1
DIV BY 2
2
PRSS-C
2
V
0
1
0
1
0
1
0
CC
WITHHYS.
SQ. AMP
VO1, VO2, VO3
(POSS HIGH)
DIV BY 2
HIP9020
(POST SCALER SELECT)
DIV-BY
(BUFFER OUTPUT)
12
14
16
18
20
22
2
10-55
Q4
DOUBLER
BUFFER
5
POSS
FREQ
BUF
6
Q1
Q1
4
(POSS HIGH)
3
DIV-BY
(PRESCALER SELECT)
VO4
10
11
1
6
7
8
9
10
A
PRESCALER
1 AND 6 - 11
14
(V, I PROT)
(V, IPROT)
(V, IPROT)
(V, IPROT)
DIV-BY
DRIVER
DRIVER
DRIVER
DRIVER
PRSS
B
9
12
30V
C
8
11
(POSS LOW)
VO1, VO2
DIV-BY
(PRESCALER OUTPUT)
12
14
16
18
20
22
2
17
16
15
20
9
6
14
13
12
11
PRSO
VO1
VO2
VO3
VO4
20
EACH OUTPUT
PROTECTED BY A
COLLECTOR-TO-BASE
ZENER DIODE CLAMP
(POSS LOW)
VO3, VO4
VOX
DIV-BY
OUTPUTS
10
11
1
6
7
8
9