PIC18F242 MICROCHIP [Microchip Technology], PIC18F242 Datasheet - Page 102
PIC18F242
Manufacturer Part Number
PIC18F242
Description
28/40-pin High Performance, Enhanced FLASH Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F242.pdf
(332 pages)
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PIC18FXX2
9.6
The Parallel Slave Port is implemented on the 40-pin
devices only (PIC18F4X2).
PORTD operates as an 8-bit wide Parallel Slave Port,
or microprocessor port when control bit, PSPMODE
(TRISE<4>) is set. It is asynchronously readable and
writable by the external world through RD control input
pin, RE0/RD and WR control input pin, RE1/WR.
It can directly interface to an 8-bit microprocessor data
bus. The external microprocessor can read or write the
PORTD latch as an 8-bit latch. Setting bit PSPMODE
enables port pin RE0/RD to be the RD input, RE1/WR
to be the WR input and RE2/CS to be the CS (chip
select) input. For this functionality, the corresponding
data direction bits of the TRISE register (TRISE<2:0>)
must be configured as inputs (set). The A/D port config-
uration bits PCFG2:PCFG0 (ADCON1<2:0>) must be
set, which will configure pins RE2:RE0 as digital I/O.
A write to the PSP occurs when both the CS and WR
lines are first detected low. A read from the PSP occurs
when both the CS and RD lines are first detected low.
The PORTE I/O pins become control inputs for the
microprocessor port when bit PSPMODE (TRISE<4>)
is set. In this mode, the user must make sure that the
TRISE<2:0> bits are set (pins are configured as digital
inputs), and the ADCON1 is configured for digital I/O.
In this mode, the input buffers are TTL.
FIGURE 9-11:
DS39564C-page 100
PORTD<7:0>
PSPIF
Parallel Slave Port
OBF
CS
WR
RD
IBF
Q1
PARALLEL SLAVE PORT WRITE WAVEFORMS
Q2
Q3
Q4
Q1
Q2
FIGURE 9-10:
One bit of PORTD
Note: I/O pin has protection diodes to V
Data Bus
Q3
Set Interrupt Flag
PSPIF (PIR1<7>)
WR LATD
or
PORTD
RD PORTD
RD LATD
Q4
TRIS Latch
Data Latch
Q
D
C K
Q1
EN
EN
Q
D
PORTD AND PORTE
BLOCK DIAGRAM
(PARALLEL SLAVE
PORT)
© 2006 Microchip Technology Inc.
Q2
Chip Select
Read
Write
Q3
TTL
DD
TTL
TTL
TTL
and V
Q4
SS
RDx
Pin
CS
WR
.
RD
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