MPC862 MOTOROLA [Motorola, Inc], MPC862 Datasheet
MPC862
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MPC862 Summary of contents
Page 1
... This document contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications for the MPC862/857T/857DSL family (refer to Table 1 for a list of devices). The MPC862P, which contains a PowerPC™ core processor, is the superset device of the MPC862/857T/857DSL family. This document describes pertinent electrical and physical characteristics of the MPC8245. For functional characteristics of the processor, refer to the MPC862 PowerQUICC Family Users Manual (MPC862UM/D) ...
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... Freescale Semiconductor, Inc. Features Features Table 1 shows the functionality supported by the members of the MPC862/857T/857DSL family. Table 1. MPC862 Family Functionality Part Instruction Cache MPC862P 16 Kbyte MPC862T 4 Kbyte MPC857T 4 Kbyte MPC857DSL 4 Kbyte 1 On the MPC857DSL, the SCC (SCC1) is for ethernet only. Also, the MPC857DSL does not support the Time Slot Assigner (TSA) ...
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... Decrementer, time base, and real-time clock (RTC) from the PowerPC architecture — Reset controller — IEEE 1149.1 test access port (JTAG) • Interrupts — Seven external interrupt request (IRQ) lines MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product can be relocated without RAM-based microcode Go to: www.freescale.com Features 3 ...
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... Supports continuous mode transmission and reception on all serial channels — 8-Kbytes of dual-port RAM — The MPC862P and MPC862T have 16 serial DMA (SDMA) channels; the MPC857T and MPC857DSL have 10 serial DMA (SDMA) channels — Three parallel I/O registers with open-drain capability • ...
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... Allows independent transmit and receive routing, frame synchronization, clocking — Allows dynamic changes — On the MPC862P and MPC862T, can be internally connected to six serial channels (four SCCs and two SMCs); on the MPC857T, can be connected to three serial channels (one SCC and two SMCs) • ...
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... Baud Rate Base-T Generators Media Access Control Parallel Interface Port and UTOPIA MII SCC1 *The MPC862T contains 4-Kbyte instruction cache and 4-Kbyte data cache. Figure 1. MPC862P/862T Block Diagram 6 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 16-Kbyte* Unified Bus 8-Kbyte* ...
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... MPC857DSL does not contain SMC2 nor the Time Slot Assigner, and provides eight SDMA controllers. Figure 2. MPC857T/MPC857DSL Block Diagram 3 Maximum Tolerated Ratings This section provides the maximum MPC862/857T/857DSL. Table 2 provides the maximum ratings. Table 2. Maximum Tolerated Ratings Rating 1 Supply voltage VDDH VDDL KAPWR VDDSYN ...
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... Caution : All inputs that tolerate 5 V cannot be more than 2.5 V greater than the supply voltage. This restriction applies to power-up and normal operation (that is, if the MPC862/857T/857DSL is unpowered, voltage greater than 2.5 V must not be applied to its inputs). ...
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... Freescale Semiconductor, Inc. 4 Thermal Characteristics Table 3 shows the thermal characteristics for the MPC862/857T/857DSL. Table 3. MPC862/857T/857DSL Thermal Resistance Data Rating 1 Junction to ambient Natural Convection Air flow (200 ft/min) 4 Junction to board 5 Junction to case 6 Junction to package top Natural Convection Air flow (200 ft/min) 1 Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air fl ...
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... Maximum power dissipation is measured at 3.5 V. Values in Table 4 represent VDDL based power dissipation and do not include I/O power dissipation over VDDH. I/O power dissipation varies widely by application due to buffer current, depending on external circuitry. 10 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Table 4. Power Dissipation ( ...
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... Freescale Semiconductor, Inc Characteristics Table 5 provides the DC electrical characteristics for the MPC862/857T/857DSL. Table 5. DC Electrical Specifications Characteristic Operating voltage Input High Voltage (all inputs except EXTAL and EXTCLK) Input Low Voltage EXTAL, EXTCLK Input High Voltage Input Leakage Current, Vin = 5.5 V (Except TMS, TRST, DSCK and DSDI pins) Input Leakage Current, Vin = 3 ...
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... The junction-to-ambient thermal resistance is an industry standard value which provides a quick and easy estimation of thermal performance. However, the answer is only an estimate; test cases have demonstrated that errors of a factor of two (in the quantity T 12 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Symbol VOL , in ° ...
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... Board Temperture Rise Above Ambient Divided by Package Figure 3. Effect of Board Temperature Rise on Thermal Behavior MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Thermal Calculation and Measurement . For instance, the user can change the air flow around θ ...
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... East Middlefield Rd. Mountain View, CA 94043 MIL-SPEC and EIA/JESD (JEDEC) Specifications (Available from Global Engineering Documents) JEDEC Specifications 14 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, ) can be used to determine the junction temperature with to: www.freescale.com (415) 964-5111 ...
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... Freq Min Max Period 20.00 30.30 Table 7 provides the bus operation timing for the MPC862/857T/857DSL at 33 MHz, 40 Mhz, 50 MHz and 66 Mhz. The timing for the MPC862/857T/857DSL bus shown assumes a 50-pF load for maximum delays and a 0-pF load for minimum delays. MOTOROLA MPC862/857T/857DSL Hardware Specifications ...
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... B1 + 6.3) B8a CLKOUT to TSIZ(0:1), REG, RSV, AT(0:3) BDIP, PTR valid (MAX = 0. 6.3) B8b CLKOUT to BR, BG, VFLS(0:1), VF(0:2), IWP(0:2), FRZ, LWP(0:1), 4 STS Valid (MAX = 0. 6.3) 16 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Table 7. Bus Operation Timings 33 MHz 40 MHz Min Max Min Max 30.30 30 ...
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... B17 CLKOUT to TA, TEA, BI, BB, BG, BR valid (hold time) (MIN = 0. 1.00 ) B17a CLKOUT to KR, RETRY, CR valid (hold time) (MIN = 0. 2.00) B18 D(0:31), DP(0:3) valid to CLKOUT 8 rising edge (setup time) (MIN = 0. 6.00) MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 33 MHz 40 MHz Min Max Min Max Min 7.60 13.80 6.30 12.50 5 ...
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... B26 CLKOUT rising edge to OE negated (MAX = 0. 9.00) B27 A(0:31) and BADDR(28:30 asserted GPCM ACS = 10, TRLX = 1 (MIN = 1. 2.00) B27a A(0:31) and BADDR(28:30 asserted GPCM ACS = 11, TRLX = 1 (MIN = 1. 2.00) 18 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 33 MHz 40 MHz Min Max Min Max Min 1.00 — ...
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... B29d WE(0:3) negated to D(0:31), DP(0:3) High-Z GPCM write access, TRLX = 1, CSNT = 1, EBDF = 0 (MIN = 1. 2.00) B29e CS negated to D(0:31), DP(0:3) High-Z GPCM write access, TRLX = 1, CSNT = 1, ACS = 10, or ACS = 11 EBDF = 0 (MIN = 1. 2.00) MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 33 MHz 40 MHz Min Max Min Max Min — ...
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... ACS = 10, ACS == 11, EBDF = 1 (MIN = 0.375 3.00) B30d WE(0:3) negated to A(0:31), BADDR(28:30) invalid GPCM write access TRLX = 1, CSNT =1, CS negated to A(0:31) invalid GPCM write access TRLX = 1, CSNT = 1, ACS = 10 or 11, EBDF = 1 20 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 33 MHz 40 MHz Min Max Min Max Min 5.00 — ...
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... UPM, EBDF = 1 (MAX = 0.375 6.60) B33 CLKOUT falling edge to GPL valid - as requested by control bit GxT4 in the corresponding word in the UPM (MAX = 0. 6.00) MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 33 MHz 40 MHz Min Max Min Max Min 1 ...
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... B1 + 1.00) B39 AS valid to CLKOUT rising edge (MIN = 0. 7.00) B40 A(0:31), TSIZ(0:1), RD/WR, BURST, valid to CLKOUT rising edge (MIN = 0. 7.00) B41 TS valid to CLKOUT rising edge (setup time) (MIN = 0. 7.00) 22 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 33 MHz 40 MHz Min Max Min Max 7.60 14 ...
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... For part speeds above 50MHz, use 9.80ns for B11a. 6 The timing required for BR input is relevant when the MPC862/857T/857DSL is selected to work with internal bus arbiter. The timing for BG input is relevant when the MPC862/857T/857DSL is selected to work with external bus arbiter. 7 For part speeds above 50MHz, use 2ns for B17. ...
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... Maximum output delay specification. B Minimum output hold time. C Minimum input setup time specification. D Minimum input hold time specification. Figure 5 provides the timing for the external clock. CLKOUT B4 24 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 0 2 2.0 V 2.0 V ...
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... Figure 6. Synchronous Output Signals Timing Figure 7 provides the timing for the synchronous active pull-up and open-drain output signals. CLKOUT TS, BB TA, BI TEA Figure 7. Synchronous Active Pull-Up Resistor and Open-Drain Outputs MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product B8a B9 B8b B11 ...
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... Figure 9 provides normal case timing for input data. It also applies to normal read accesses under the control of the UPM in the memory controller. CLKOUT TA D[0:31], DP[0:3] Figure 9. Input Data Timing in Normal Case 26 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, B16 B17 B16a B17a B16b B17 ...
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... CLKOUT B11 TS B8 A[0:31] B22 CSx OE B28 WE[0:3] D[0:31], DP[0:3] Figure 11. External Bus Read Timing (GPCM Controlled—ACS = 00) MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, B20 B21 Memory Controller and DLT3 = 1 B12 B23 B25 B18 Go to: www.freescale.com Bus Signal Timing B26 B19 27 ...
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... Figure 12. External Bus Read Timing (GPCM Controlled—TRLX = 0, ACS = 10) CLKOUT B11 TS B8 A[0:31] CSx OE D[0:31], DP[0:3] Figure 13. External Bus Read Timing (GPCM Controlled—TRLX = 0, ACS = 11) 28 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, B12 B23 B22a B24 B25 B18 B12 B22b B22c B23 ...
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... Freescale Semiconductor, Inc. CLKOUT B11 TS A[0:31] CSx OE D[0:31], DP[0:3] Figure 14. External Bus Read Timing (GPCM Controlled—TRLX = 1, MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, B12 B8 B22a B27 B27a B22b B22c B18 ACS = 10, ACS = 11) Go to: www.freescale.com Bus Signal Timing B23 B26 B19 ...
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... Figure 15 through Figure 17 provide the timing for the external bus write controlled by various GPCM factors. CLKOUT B11 TS B8 A[0:31] B22 CSx WE[0:3] B26 OE D[0:31], DP[0:3] Figure 15. External Bus Write Timing (GPCM Controlled—TRLX = 0,1 CSNT = 0) 30 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, B12 B23 B25 B8 Go to: www.freescale.com B30 B28 B29b B29 B9 MOTOROLA ...
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... B11 TS B8 A[0:31] B22 CSx WE[0:3] B26 OE D[0:31], DP[0:3] Figure 16. External Bus Write Timing (GPCM Controlled—TRLX = 0,1 CSNT = 1) MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, B12 B28b B28d B25 B28a B28c B8 Go to: www.freescale.com Bus Signal Timing B30a B30c B23 B29c B29g B29a B29f ...
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... Bus Signal Timing Bus Signal Timing CLKOUT B11 TS A[0:31] CSx WE[0:3] B26 OE D[0:31], DP[0:3] Figure 17. External Bus Write Timing (GPCM Controlled—TRLX = 0,1, CSNT = 1) 32 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, B12 B8 B22 B28b B28d B25 B8 B28a B28c Go to: www.freescale.com B30b B30d B23 B29e B29i ...
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... Figure 18 provides the timing for the external bus controlled by the UPM. CLKOUT B8 A[0:31] CSx B34b BS_A[0:3], BS_B[0:3] B35 B35b GPL_A[0:5], GPL_B[0:5] Figure 18. External Bus Timing (UPM Controlled Signals) MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, B31a B31d B31 B31b B34 B34a B32a B32d B32 B32b B36 B35a B33 Go to: www ...
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... Figure 20 provides the timing for the asynchronous negated UPWAIT signal controlled by the UPM. CLKOUT B37 UPWAIT B38 CSx BS_A[0:3], BS_B[0:3] GPL_A[0:5], GPL_B[0:5] Figure 20. Asynchronous UPWAIT Negated Detection in UPM Handled 34 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Cycles Timing Cycles Timing Go to: www.freescale.com MOTOROLA ...
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... Figure 22. Asynchronous External Master Memory Access Timing Figure 23 provides the timing for the asynchronous external master control signals negation. AS CSx, WE[0:3], OE, GPLx, BS[0:3] Figure 23. Asynchronous External Master—Control Signals Negation Timing MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, B41 B42 B40 (GPCM Handled ACS = 00) B39 B40 (GPCM Controlled— ...
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... CLKOUT. The timings I41, I42, and I43 are specified to allow the correct function of the IRQ lines detection circuitry, and has no direct relation with the total system interrupt latency that the MPC862/857T/857DSL is able to support. Figure 24 provides the interrupt detection timing for the external level-sensitive lines. ...
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... These synchronous timings define when the WAITx signals are detected in order to freeze (or relieve) the PCMCIA current cycle. The WAITx assertion will be effective only detected 2 cycles before the PSL timer expiration. See PCMCIA Interface in the MPC862 PowerQUICC User s Manual . MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Table 9 ...
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... Figure 26 provides the PCMCIA access cycle timing for the external bus read. CLKOUT TS A[0:31] P46 REG P48 CE1/CE2 PCOE, IORD P52 ALE D[0:31] Figure 26. PCMCIA Access Cycles Timing External Bus Read 38 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, P44 P45 P50 P53 B18 Go to: www.freescale.com P47 P49 P51 P52 B19 MOTOROLA ...
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... ALE D[0:31] Figure 27. PCMCIA Access Cycles Timing External Bus Write Figure 28 provides the PCMCIA WAIT signals detection timing. CLKOUT WAITx Figure 28. PCMCIA WAIT Signals Detection Timing MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, P44 P45 P50 P53 B18 P55 P56 Go to: www ...
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... Figure 29 provides the PCMCIA output port timing for the MPC862/857T/857DSL. CLKOUT Output Signals HRESET P58 OP2, OP3 Figure 29. PCMCIA Output Port Timing Figure 30 provides the PCMCIA output port timing for the MPC862/857T/857DSL. CLKOUT Input Signals Figure 30. PCMCIA Input Port Timing 40 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Table 10 ...
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... Freescale Semiconductor, Inc. Table 11 shows the debug port timing for the MPC862/857T/857DSL. Num Characteristic D61 DSCK cycle time D62 DSCK clock pulse width D63 DSCK rise and fall times D64 DSDI input data setup time D65 DSDI data hold time D66 ...
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... Freescale Semiconductor, Inc. Bus Signal Timing Bus Signal Timing Table 12 shows the reset timing for the MPC862/857T/857DSL. Num Characteristic CLKOUT to HRESET high impedance R69 (MAX = 0. 20.00) CLKOUT to SRESET high impedance R70 (MAX = 0. 20.00) RSTCONF pulse width R71 (MIN = 17.00 x B1) R72 — ...
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... Figure 34. Reset Timing—Data Bus Weak Drive during Configuration Figure 35 provides the reset timing for the debug port configuration. CLKOUT SRESET DSCK, DSDI Figure 35. Reset Timing—Debug Port Configuration MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, R71 R76 R73 R74 R75 ...
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... Freescale Semiconductor, Inc. IEEE 1149.1 Electrical Specifications IEEE 1149.1 Electrical Specifications 10 IEEE 1149.1 Electrical Specifications Table 13 provides the JTAG timings for the MPC862/857T/857DSL shown in Figure 36 though Figure 39. Num Characteristic J82 TCK cycle time J83 TCK clock pulse width measured at 1.5 V J84 ...
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... Signals Output Signals Figure 39. Boundary Scan (JTAG) Timing Diagram 11 CPM Electrical Characteristics This section provides the AC and DC electrical specifications for the communications processor module (CPM) of the MPC862/857T/857DSL. MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, J85 J86 J87 ...
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... Data-in hold time from clock high 31 Clock low to data-out valid (CPU writes data, control, or direction Specification 23 DATA-IN STBI STBO Figure 40. PIP Rx (Interlock Mode) Timing Diagram 46 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Table 14. PIP/PIO Timing to: www.freescale.com All Frequencies Unit ...
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... DATA-IN STBI (Input) STBO (Output) Figure 42. PIP Rx (Pulse Mode) Timing Diagram DATA-OUT STBO (Output) STBI (Input) Figure 43. PIP TX (Pulse Mode) Timing Diagram MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product to: www.freescale.com CPM Electrical Characteristics ...
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... Table 16 provides the IDMA controller timings as shown in Figure 46 though Figure 49. Num Characteristic 40 DREQ setup time to clock high 41 DREQ hold time from clock high 42 SDACK assertion delay from clock high 48 MPC862/857T/857DSL Hardware Specifications For More Information On This Product Table 15. Port C Interrupt Timing 35 Table 16. IDMA Controller Timing Go to: www.freescale.com 30 33.34 MHz ...
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... Figure 46. IDMA External Requests Timing Diagram CLKO (Output) TS (Output) R/W (Output) DATA TA (Input) SDACK Figure 47. SDACK Timing Diagram—Peripheral Write, Externally-Generated TA MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product to: www.freescale.com CPM Electrical Characteristics All Frequencies Unit Min Max — ...
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... TS (Output) R/W (Output) DATA TA (Output) SDACK Figure 48. SDACK Timing Diagram—Peripheral Write, Internally-Generated TA CLKO (Output) TS (Output) R/W (Output) DATA TA (Output) SDACK Figure 49. SDACK Timing Diagram—Peripheral Read, Internally-Generated TA 50 MPC862/857T/857DSL Hardware Specifications For More Information On This Product to: www.freescale.com 45 MOTOROLA ...
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... TIN/TGATE rise and fall time 62 TIN/TGATE low time 63 TIN/TGATE high time 64 TIN/TGATE cycle time 65 CLKO low to TOUT valid MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, CPM Electrical Characteristics Table 18. Timer Timing Go to: www.freescale.com All Frequencies Unit ...
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... L1CLK edge to L1TXD valid 80A L1TSYNC valid to L1TXD valid 81 L1CLK edge to L1TXD high impedance 82 L1RCLK, L1TCLK frequency (DSC =1) 83 L1RCLK, L1TCLK width low (DSC =1) 52 MPC862/857T/857DSL Hardware Specifications For More Information On This Product Table 19. SI Timing ...
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... CE=0) (Input) 71 L1RCLK (FE=1, CE=1) (Input) L1RSYNC (Input) 73 L1RXD (Input) 76 L1ST(4-1) (Output) Figure 52. SI Receive Timing Diagram with Normal Clocking (DSC = 0) MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Table 19. SI Timing (continued 71a 72 RFSD BIT0 78 Go to: www.freescale.com ...
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... CPM Electrical Characteristics L1RCLK (FE=1, CE=1) (Input) 82 L1RCLK (FE=0, CE=0) (Input) 75 L1RSYNC (Input L1RXD (Input) 76 L1ST(4-1) (Output) L1CLKO (Output) Figure 53. SI Receive Timing with Double-Speed Clocking (DSC = 1) 54 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 72 83a RFSD=1 77 BIT0 to: www.freescale.com 79 MOTOROLA ...
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... Freescale Semiconductor, Inc. L1TCLK (FE=0, CE=0) (Input) 71 L1TCLK (FE=1, CE=1) (Input) 73 L1TSYNC (Input) 80a L1TXD BIT0 (Output) 80 L1ST(4-1) (Output) Figure 54. SI Transmit Timing Diagram (DSC = 0) MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product TFSD to: www.freescale.com CPM Electrical Characteristics ...
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... CPM Electrical Characteristics L1RCLK (FE=0, CE=0) (Input) 82 L1RCLK (FE=1, CE=1) (Input) TFSD=0 75 L1RSYNC (Input L1TXD BIT0 (Output) 80 78a L1ST(4-1) (Output L1CLKO (Output) Figure 55. SI Transmit Timing with Double Speed Clocking (DSC = 1) 56 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 72 83a 81 Go to: www.freescale.com 79 MOTOROLA ...
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... Freescale Semiconductor, Inc. MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, CPM Electrical Characteristics Figure 56. IDL Timing Go to: www.freescale.com 57 ...
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... CD1 setup time to RCLK1 rising edge 1 The ratios SyncCLK/RCLK1 and SyncCLK/TCLK1 must be greater or equal to 3/1. 2 Also applies to CD and CTS hold time when they are used as an external sync signals. 58 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 1 1/SYNCCLK 1/SYNCCLK + ...
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... TxD1 (Output) RTS1 (Output) CTS1 (Input) CTS1 (SYNC Input) Figure 58. SCC NMSI Transmit Timing Diagram MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 102 101 100 107 101 100 103 105 104 Go to: www.freescale.com CPM Electrical Characteristics ...
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... TXD1 inactive delay (from TCLK1 rising edge) 133 TENA active delay (from TCLK1 rising edge) 134 TENA inactive delay (from TCLK1 rising edge) 60 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 101 100 107 105 Table 22. Ethernet Timing Go to: www.freescale.com ...
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... SDACK is asserted whenever the SDMA writes the incoming frame DA into memory. CLSN(CTS1) (Input) Figure 60. Ethernet Collision Timing Diagram RCLK1 RxD1 (Input) RENA(CD1) (Input) Figure 61. Ethernet Receive Timing Diagram MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product 120 121 121 124 125 126 Go to: www.freescale.com ...
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... RxD1 0 1 (Input) Start Frame Delimiter RSTRT (Output) Figure 63. CAM Interface Receive Start Timing Diagram REJECT Figure 64. CAM Interface REJECT Timing Diagram 62 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 128 129 121 132 1 BIT1 125 137 Go to: www.freescale.com 134 ...
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... SMSYNC 154 155 SMRXD (Input) NOTE: 1. This delay is equal to an integer number of character-length clocks. Figure 65. SMC Transparent Timing Diagram MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, CPM Electrical Characteristics 151 151A 150 NOTE 1 153 155 Go to: www.freescale.com All Frequencies ...
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... SPIMISO msb (Input) 165 167 SPIMOSI msb (Output) Figure 66. SPI Master ( Timing Diagram 64 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Table 24. SPI Master Timing 167 166 160 167 166 Data lsb 164 166 Data lsb Go to: www ...
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... Slave sequential transfer delay (does not require deselect) 175 Slave data setup time (inputs) 176 Slave data hold time (inputs) 177 Slave access time MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, CPM Electrical Characteristics 167 166 160 167 166 ...
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... SPICLK (CI=1) (Input) 177 SPIMISO Undef msb (Output) 175 SPIMOSI msb (Input) Figure 69. SPI Slave ( Timing Diagram 66 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 172 182 181 170 181 182 Data lsb 179 181 182 Data lsb 172 ...
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... SDL/SCL fall time 211 Stop condition setup time 1 SCL frequency is given by SCL = BrgClk_frequency / ((BRG register + 3) * pre_scaler * 2). The ratio SyncClk/(Brg_Clk/pre_scaler) must be greater or equal to 4/1. MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product Timing (SCL < 100 Timing (SCL > 100 kH ...
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... UTPB, SOC, Rxclav and Txclav setup time U4 UTPB, SOC, Rxclav and Txclav hold time U5 UTPB, SOC active delay (and PHREQ and PHSEL active delay in MPHY mode) 68 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, 204 207 209 210 2 C Bus Timing Diagram ...
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... MII signals are independent of system clock frequency (part speed designation). Furthermore, MII signals use TTL signal levels compatible with devices operating at either 5.0 or 3.3 V. MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, FEC Electrical Characteristics U1 ...
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... MII_TX_CLK frequency - 1%. Table 30 provides information on the MII transmit signal timing. Table 30. MII Transmit Signal Timing Num Characteristic M5 MII_TX_CLK to MII_TXD[3:0], MII_TX_EN, MII_TX_ER invalid M6 MII_TX_CLK to MII_TXD[3:0], MII_TX_EN, MII_TX_ER valid 70 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Min 5 5 35% 35 ...
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... Table 31. MII Async Inputs Signal Timing Num Characteristic M9 MII_CRS, MII_COL minimum pulse width Figure 75 shows the MII asynchronous inputs signal timing diagram. MII_CRS, MII_COL Figure 75. MII Async Inputs Timing Diagram MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, FEC Electrical Characteristics Min 35% 35 ...
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... MII_MDC pulse width high M15 MII_MDC pulse width low Figure 76 shows the MII serial management channel timing diagram. MII_MDC (output) MII_MDIO (output) MII_MDIO (input) Figure 76. MII Serial Management Channel Timing Diagram 72 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Min 0 — 40% 40% ...
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... Mbps MPC857DSL One (SCC1) 10/100 Mbps 1 Serial communications controller (SCC) Table 34 identifies the packages and operating frequencies orderable for the MPC862/857T/857DSL derivative devices. Table 34. MPC862/857T/857DSL Package/Frequency Orderable Package Type Plastic ball grid array (ZP suffix) Plastic ball grid array (CZP suffi ...
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... Mechanical Data and Ordering Information Mechanical Data and Ordering Information 14.1 Pin Assignments . Figure 77 shows the top view pinout of the PBGA package. For additional information, see the MPC862 PowerQUICC Family User s Manual. NOTE: This is the top view of the device. PD10 PD8 PD3 ...
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... Freescale Semiconductor, Inc. Table 35 contains a list of the MPC862 input and output signals and shows multiplexing and pin assignments. Name A[0:31] B19, B18, A18, C16, B17, A17, B16, A16, D15, C15, B15, A15, C14, B14, A14, D12, C13, B13, D9, D11, C12, B12, B10, B11, C11, D10, ...
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... GPL_A1 GPL_B1 GPL_A[2:3] B5, C5 GPL_B[2:3] CS[2–3] UPWAITA C1 GPL_A4 UPWAITB B1 GPL_B4 GPL_A5 D3 PORESET R2 76 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Pin Number Go to: www.freescale.com Type Bidirectional Bidirectional Active Pull-up Bidirectional Input Input Input Output Output Output Output Output Output ...
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... UTPB_Split4 MII-RXCLK IP_A5 U5 2 UTPB_Split5 MII-RXERR IP_A6 T6 2 UTPB_Split6 MII-TXERR MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Mechanical Data and Ordering Information Pin Number Go to: www.freescale.com Type Input Open-drain Open-drain Analog Output Analog Input (3.3 V only) Analog Input Output Input (3 ...
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... MODCK1 STS OP3 M4 MODCK2 DSDO BADDR30 K4 REG BADDR[28:29] M3 PA15 C18 RXD1 RXD4 78 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Pin Number Go to: www.freescale.com Type Input Bidirectional Three-state Bidirectional Bidirectional Three-state Bidirectional Bidirectional Bidirectional Bidirectional Three-state Bidirectional Three-state ...
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... TOUT2 PA3 P17 CLK5 BRGO3 TIN3 PA2 R18 CLK6 TOUT3 L1RCLKB MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Mechanical Data and Ordering Information Pin Number Go to: www.freescale.com Type Bidirectional (Optional: Open-drain) Bidirectional Bidirectional (Optional: Open-drain) Bidirectional (Optional: Open-drain) ...
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... SMSYN1 PB22 L19 2 TXADDR4 SDACK2 SMSYN2 PB21 K16 SMTXD2 L1CLKOB 1 PHSEL1 2 TXADDR1 80 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Pin Number Go to: www.freescale.com Type Bidirectional Bidirectional Bidirectional (Optional: Open-drain) Bidirectional (Optional: Open-drain) Bidirectional (Optional: Open-drain) Bidirectional (Optional: Open-drain) Bidirectional ...
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... L1ST2 PC13 E18 L1RQb L1ST3 RTS3 PC12 F18 L1RQa L1ST4 RTS4 MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Mechanical Data and Ordering Information Pin Number Go to: www.freescale.com Type Bidirectional (Optional: Open-drain) Bidirectional (Optional: Open-drain) Bidirectional (Optional: Open-drain) Bidirectional ...
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... PD13 V18 L1TSYNCB MII-RXD1 UTPB2 PD12 R16 L1RSYNCB MII-MDC UTPB3 PD11 T16 RXD3 MII-TXERR RXENB 82 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Pin Number Go to: www.freescale.com Type Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional ...
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... DSCK TRST G19 TDO G17 DSDO M_CRS B7 M_MDIO H18 M_TXEN V15 M_COL H4 MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Mechanical Data and Ordering Information Pin Number Go to: www.freescale.com Type Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Bidirectional Input ...
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... Plastic Ball Grid Array Application Note (order number: AN1231/D) available from your local Motorola sales office. Figure 78 shows the mechanical dimensions of the PBGA package. 84 MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Pin Number Go to: www.freescale.com ...
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... BOTTOM VIEW Figure 78. Mechanical Dimensions and Bottom Surface Nomenclature MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Mechanical Data and Ordering Information 0.2 0 0. 18X e NOTES: 1. Dimensions and tolerancing per ASME Y14.5M, 1994 ...
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... Specification changed to include the MPC857T and MPC857DSL. • Changed maximum operating frequency from 80 MHz to 100 MHz. • Removed MPC862DP, DT, and SR derivatives and part numbers. • Corrected power dissipation numbers. • Changed UTOPIA maximum frequency from 50 MHz to 33 MHz. ...
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... Freescale Semiconductor, Inc. THIS PAGE INTENTIONALLY LEFT BLANK MOTOROLA MPC862/857T/857DSL Hardware Specifications For More Information On This Product, Go to: www.freescale.com Document Revision History 87 ...
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... The PowerPC name is a trademark of IBM Corp. and used under license. All other product or service names are the property of their respective owners. Motorola, Inc Equal Opportunity/Affirmative Action Employer. © Motorola, Inc. 2003 MPC862EC/D For More Information On This Product, Go to: www.freescale.com ...