PIC12F609-I/PQTP MICROCHIP [Microchip Technology], PIC12F609-I/PQTP Datasheet - Page 97

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PIC12F609-I/PQTP

Manufacturer Part Number
PIC12F609-I/PQTP
Description
8-Pin Flash-Based, 8-Bit CMOS Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
11.2
The 8 MHz internal oscillator is factory calibrated.
These calibration values are stored in fuses located in
the Calibration Word (2009h). The Calibration Word is
not erased when using the specified bulk erase
sequence in the “PIC12F6XX/16F6XX Memory Pro-
gramming Specification” (DS41204) and thus, does not
require reprogramming.
11.3
The PIC12F609/615/12HV609/615 device differenti-
ates between various kinds of Reset:
a)
b)
c)
d)
e)
f)
FIGURE 11-1:
© 2006 Microchip Technology Inc.
MCLR/V
CLKIN pin
Power-on Reset (POR)
WDT Reset during normal operation
WDT Reset during Sleep
MCLR Reset during normal operation
MCLR Reset during Sleep
Brown-out Reset (BOR)
OSC1/
V
Note 1:
DD
Calibration Bits
Reset
PP
pin
OST/PWRT
RC OSC
On-Chip
Refer to the Configuration Word register (Register 11-1).
Brown-out
V
Module
DD
Detect
WDT
Reset
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Rise
OST
PWRT
(1)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
BOREN
Power-on Reset
External
Reset
Sleep
PIC12F609/615/12HV609/615
Preliminary
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
WDT wake-up does not cause register resets in the
same manner as a WDT Reset since wake-up is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 11-2. Software can use
these bits to determine the nature of the Reset. See
Table 11-5 for a full description of Reset states of all
registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 11-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 15.0 “Electrical
Specifications” for pulse-width specifications.
Enable PWRT
Enable OST
S
R
DS41302A-page 95
Q
Chip_Reset

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