CY37000 CYPRESS [Cypress Semiconductor], CY37000 Datasheet - Page 8

• Manufacturer Part Number: CY37000
• Description: 5V, 3.3V, ISR High-Performance CPLDs
• Manufacturer: CYPRESS [Cypress Semiconductor]

IEEE 1149.1 Compliant JTAG
The Ultra37000 family has an IEEE 1149.1 JTAG interface for
both Boundary Scan and ISR.
Boundary Scan
The Ultra37000 family supports Bypass, Sample/Preload, Ex-
test, Idcode, and Usercode boundary scan instructions. The
JTAG interface is shown in Figure 6.
In-System Reprogramming (ISR)
In-System Reprogramming is the combination of the capability
to program or reprogram a device on-board, and the ability to
support design changes without changing the system timing
or device pinout. This combination means design changes
during debug or field upgrades do not cause board respins.
The Ultra37000 family implements ISR by providing a JTAG
compliant interface for on-board programming, robust routing
resources for pinout flexibility, and a simple timing model for
consistent system performance.
Development Software Support
Warp
Warp is a state-of-the-art compiler and complete CPLD design
tool. For design entry, Warp provides an IEEE-STD-1076/1164
VHDL text editor, an IEEE-STD-1364 Verilog text editor, and a
graphical finite state machine editor. It provides optimized syn-
thesis and fitting by replacing basic circuits with ones pre-op-
timized for the target device, by implementing logic in unused
memory and by perfect communication between fitting and
synthesis. To facilitate design and debugging, Warp provides
graphical timing simulation and analysis.
Warp Professional
Warp Professional contains several additional features. It pro-
vides an extra method of design entry with its graphical block
diagram editor. It allows up to 5 ms timing simulation instead
of only 2 ms. It allows comparison of waveforms before and
after design changes.
Warp Enterprise
Warp Enterprise provides even more features. It provides un-
limited timing simulation and source-level behavioral simula-
Document #: 38-03007 Rev. **
TMS
TCK
TDI
™
CONTROLLER
JTAG
TAP
™
Figure 6. JTAG Interface
™
Instruction Register
Boundary Scan
Bypass Reg.
idcode
Usercode
ISR Prog.
Data Registers
TDO
tion as well as a debugger. It has the ability to generate graph-
ical HDL blocks from HDL text. It can even generate
testbenches.
Warp is available for PC and UNIX platforms. Some features
are not available in the UNIX version. For further information
see the Warp for PC, Warp for UNIX, Warp Professional and
Warp Enterprise data sheets on Cypress’s web site
(www.cypress.com).
Third-Party Software
Although Warp is a complete CPLD development tool on its
own, it interfaces with nearly every third party EDA tool. All
major third-party software vendors provide support for the
Ultra37000 family of devices. Refer to the third-party software
data sheet or contact your local sales office for a list of current-
ly supported third-party vendors.
Programming
There are four programming options available for Ultra37000
devices. The first method is to use a PC with the 37000
UltraISR programming cable and software. With this method,
the ISR pins of the Ultra37000 devices are routed to a connec-
tor at the edge of the printed circuit board. The 37000 UltraISR
programming cable is then connected between the parallel
port of the PC and this connector. A simple configuration file
instructs the ISR software of the programming operations to
be performed on each of the Ultra37000 devices in the system.
The ISR software then automatically completes all of the nec-
essary data manipulations required to accomplish the pro-
gramming, reading, verifying, and other ISR functions. For
more information on the Cypress ISR Interface, see the ISR
Programming Kit data sheet (CY3700i).
The second method for programming Ultra37000 devices is on
automatic test equipment (ATE). This is accomplished through
a file created by the ISR software. Check the Cypress website
for the latest ISR software download information.
The third programming option for Ultra37000 devices is to uti-
lize the embedded controller or processor that already exists
in the system. The Ultra37000 ISR software assists in this
method by converting the device JEDEC maps into the ISR
serial stream that contains the ISR instruction information and
the addresses and data of locations to be programmed. The
embedded controller then simply directs this ISR stream to the
chain of Ultra37000 devices to complete the desired reconfig-
uring or diagnostic operations. Contact your local sales office
for information on availability of this option.
The fourth method for programming Ultra37000 devices is to
use the same programmer that is currently being used to pro-
gram F
For all pinout, electrical, and timing requirements, refer to de-
vice data sheets. For ISR cable and software specifications,
refer to the UltraISR kit data sheet (CY3700i).
Third-Party Programmers
As with development software, Cypress support is available on
a wide variety of third-party programmers. All major third-party
programmers (including BP Micro, Data I/O, and SMS) support
the Ultra37000 family.
LASH
370i devices.
Ultra37000™ CPLD Family
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