AD7367-5ARUZ AD [Analog Devices], AD7367-5ARUZ Datasheet - Page 20

• Manufacturer Part Number: AD7367-5ARUZ
• Description: 1 MSPS, 8-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC
• Manufacturer: AD [Analog Devices]

AD7329
TYPICAL CONNECTION DIAGRAM
Figure 34 shows a typical connection diagram for the AD7329.
In this configuration, the AGND pin is connected to the analog
ground plane of the system, and the DGND pin is connected to
the digital ground plane of the system. The analog inputs on the
AD7329 can be configured to operate in single-ended, true
differential, or pseudo differential mode. The AD7329 can operate
with either an internal or external reference. In Figure 34, the
AD7329 is configured to operate with the internal 2.5 V reference.
A 680 nF decoupling capacitor is required when operating with
the internal reference.
The V
voltage. The V
voltage analog input structures. The voltage on these pins must
be equal to or greater than the highest analog input range
selected on the analog input channels (see Table 6 for more
information). The V
of the microprocessor. The voltage applied to the V
controls the voltage of the serial interface.
+15V
–15V
+15V
–15V
ANALOG INPUTS
±10V, ±5V, ±2.5V
0V TO +10V
ANALOG INPUTS
±10V, ±5V, ±2.5V
0V TO +10V
CC
Figure 34. Typical Connection Diagram (Single-Ended Mode)
680nF
0.1µF
Figure 35. Typical Connection Diagram (Differential Mode)
0.1µF
0.1µF
680nF
pin can be connected to either a 3 V or a 5 V supply
0.1µF
+
+
+
DD
10µF
10µF
+
10µF
10µF
V
V
V
V
V
V
V
V
REF
IN
IN
IN
IN
IN
IN
IN
IN
V
V
V
V
V
V
V
V
V
REF
and V
V
V
DD
IN
IN
IN
IN
IN
IN
IN
IN
DD
0
1
2
3
4
5
6
7
SS
V
IN
0
1
2
3
4
5
6
7
SS
1
1
IN
/REF
1
FILTERING/BUFFERING
DRIVE
/REF
1
FILTERING/BUFFERING
MUX
MUX
1
MINIMUM V
DEPEND ON THE HIGHEST ANALOG INPUT
RANGE SELECTED.
1
OUT
MINIMUM V
DEPEND ON THE HIGHEST ANALOG INPUT
RANGE SELECTED.
SS
OUT
OUT
AD7329
OUT
AD7329
are the dual supplies for the high
pin is connected to the supply voltage
+
–
ADC
ADC
DD
DD
AND V
IN
IN
AND V
+
–
V
AGND
V
DGND
DOUT
V
AGND
SCLK
SS
DRIVE
V
DGND
DOUT
CC
SCLK
DRIVE
SS
CC
DIN
CS
DIN
SUPPLY VOLTAGES
CS
SUPPLY VOLTAGES
10µF
10µF
10µF
10µF
+
+
+
0.1µF
+
0.1µF
0.1µF
INTERFACE
0.1µF
INTERFACE
SERIAL
SERIAL
+3V SUPPLY
+3V SUPPLY
DRIVE
V
V
CC
CC
µC/µP
µC/µP
+2.7V TO +5.25V
+2.7V TO +5.25V
input
Rev. 0 | Page 20 of 40
ANALOG INPUT
Single-Ended Inputs
The AD7329 has a total of eight analog inputs when operating
in single-ended mode. Each analog input can be independently
programmed to one of the four analog input ranges. In applications
where the signal source is high impedance, it is recommended
to buffer the signal before applying it to the ADC analog inputs.
Figure 36 shows the configuration of the AD7329 in single-
ended mode.
True Differential Mode
The AD7329 can have four true differential analog input pairs.
Differential signals have some benefits over single-ended
signals, including better noise immunity based on the device’s
common-mode rejection and improvements in distortion
performance. Figure 37 defines the configuration of the true
differential analog inputs of the AD7329.
The amplitude of the differential signal is the difference
between the signals applied to the V
each differential pair (V
be simultaneously driven by two signals of equal amplitude,
dependent on the input range selected, that are 180° out of
phase. Assuming the ±4 × V
differential signal is −20 V to +20 V p-p (2 × 4 × V
regardless of the common mode.
The common mode is the average of the two signals
and is therefore the voltage on which the two input signals are
centered.
(V
AGND
Figure 36. Single-Ended Mode Typical Connection Diagram
IN
+ + V
IN
1
ADDITIONAL PINS OMITTED FOR CLARITY.
−)/2
Figure 37. True Differential Inputs
1
ADDITIONAL PINS OMITTED FOR CLARITY.
IN
+ − V
V+
V–
REF
IN
mode, the amplitude of the
V
V
IN
IN
−). V
+
–
AD7329
IN
+ and V
IN
V
+ and V
IN
+
AD7329
1
IN
− pins in
V
V
IN
DD
SS
1
− should
REF
V
5V
CC
),