DP8570 NSC [National Semiconductor], DP8570 Datasheet - Page 13

• Manufacturer Part Number: DP8570
• Description: Timer Clock Peripheral (TCP)
• Manufacturer: NSC [National Semiconductor]

Functional Description
INPUT CLOCK SELECTION
The input frequency to the timers may be selected Each
timer has a prescaler that gives a wide selection of clocking
rates In addition the DP8570A has a single external clock
input pin that can be selected for either of the timers Table
IV shows the range of programmable clocks available and
the corresponding setting in the Timer Control Register
Note that the second and third selections are not fixed fre-
quencies but depend on the crystal oscillator frequency
chosen
Since the input clock frequencies are usually running asyn-
chronously to the timer Start Stop control bit a 1 clock cy-
cle error may result This error results when the Start Stop
occurs just after the clock edge (max error) To minimize
this error on all clocks an independent prescaler is used for
each timer and is designed so that its Start Stop error is
less than 1 clock cycle
The count hold gate bit in the Timer Control Register and
the external enable pins G0 G1 can be used to suspend
the timer operation in modes 0 1 and 2 (in mode 3 it is the
trigger input) The external pin and the register bit are OR’ed
C2
0
0
0
0
1
1
1
1
TABLE IV Programmable Timer Input Clocks
C1
0
0
1
1
0
0
1
1
C0
0
1
0
1
0
1
0
1
External
Crystal Oscillator
(Crystal Oscillator) 4
93 5 s (10 7 kHz)
1 ms (1 kHz)
10 ms (100 Hz)
1 10 Second (10 Hz)
1 Second (1 Hz)
Selected Clock
(Continued)
FIGURE 7 DP8570A Timer Block Diagram
13
together so that when either is high the timers are suspend-
ed Suspending the timer causes the same synchronization
error that starting the timer does The range of errors is
specified in Table V
MODES OF OPERATION
Bits M0 and M1 in the Timer Control Registers are used to
specify the modes of operation The mode selection is de-
scribed in Table VI
MODE 0 SINGLE PULSE GENERATOR
When the timer is in this mode the output will be initially low
if the Timer Start Stop bit is low (stopped) When this mode
is initiated the timer output will go high on the next falling
edge of the prescaler’s input clock
TABLE VI Programmable Timer Modes of Operation
M1
0
0
1
1
Clock Selected
External
Crystal
Crystal 4
10 7 kHz
1 kHz
100 Hz
10 Hz
1 Hz
TABLE V Maximum Synchronization Errors
M0
0
1
0
1
Single Pulse Generator
Rate Generator Pulse Output
Square Wave Output
Retriggerable One Shot
Function
a
a
a
a
a
a
a
a
Ext Clock Period
1 Crystal Clock Period
1 Crystal Clock Period
32 s
32 s
32 s
32 s
32 s
Error
the contents
TL F 8638 – 9
Mode 0
Mode 1
Mode 2
Mode 3
Modes