M41T00M STMICROELECTRONICS [STMicroelectronics], M41T00M Datasheet - Page 9

• Manufacturer Part Number: M41T00M
• Description: Serial Access TIMEKEEPER
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Figure 8. Bus Timing Requirements Sequence
Note: P = STOP and S = START
Figure 9. Slave Address Location
CLOCK CALIBRATION
The M41T00 is driven by a quartz controlled oscil-
lator with a nominal frequency of 32,768Hz. The
devices are tested not to exceed 35ppm (parts per
million) oscillator frequency error at 25°C, which
equates to about ±1.53 minutes per month. With
the calibration bits properly set, the accuracy of
each M41T00 improves to better than +2/–1 ppm
at 25°C.
The oscillation rate of any crystal changes with
temperature (see Figure 14). Most clock chips
START
SDA
SCL
1
tBUF
SLAVE ADDRESS
1
P
0
1
0
S
0
0
R/W
tHD:STA
tR
A
tLOW
AI00602
tHIGH
tF
compensate for crystal frequency and tempera-
ture shift error with cumbersome trim capacitors.
The M41T00 design, however, employs periodic
counter correction. The calibration circuit adds or
subtracts counts from the oscillator divider circuit
at the divide by 256 stage, as shown in Figure 13.
The number of times pulses are blanked (subtract-
ed, negative calibration) or split (added, positive
calibration) depends upon the value loaded into
the five bit Calibration byte found in the Control
Register. Adding counts speeds the clock up, sub-
tracting counts slows the clock down.
The Calibration byte occupies the five lower order
bits (D4-D0) in the Control register (Addr 7). This
byte can be set to represent any value between 0
and 31 in binary form. Bit D5 is a Sign bit; '1' indi-
cates positive calibration, '0' indicates negative
calibration. Calibration occurs within a 64minute
cycle. The first 62 minutes in the cycle may, once
per minute, have one second either shortened by
128 or lengthened by 256 oscillator cycles. If a bi-
nary '1' is loaded into the register, only the first 2
minutes in the 64 minute cycle will be modified; if
a binary 6 is loaded, the first 12 will be affected,
and so on.
Therefore, each calibration step has the effect of
adding 512 or subtracting 256 oscillator cycles for
every 125,829,120 actual oscillator cycles, that is
+4.068 or –2.034 ppm of adjustment per calibra-
tion step in the calibration register. Assuming that
the oscillator is in fact running at exactly 32,768Hz,
each of the 31 increments in the Calibration byte
would represent +10.7 or –5.35 seconds per
month which corresponds to a total range of +5.5
or –2.75 minutes per month.
tHD:DAT
tSU:DAT
SR
tSU:STA
tHD:STA
P
AI00589
tSU:STO
M41T00
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