PCA8565BS NXP [NXP Semiconductors], PCA8565BS Datasheet
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PCA8565BS
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PCA8565BS Summary of contents
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PCA8565 Real time clock/calendar Rev. 02 — 16 June 2009 1. General description The PCA8565 is a CMOS consumption. A programmable clock output, interrupt output and voltage-low detector are also provided. All address and data are transferred serially via a ...
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... NXP Semiconductors 4. Ordering information Table 1. Type number PCA8565TS PCA8565BS 5. Marking Table 2. Type number PCA8565TS PCA8565BS PCA8565_2 Product data sheet Ordering information Package Name Description TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm HVSON10 plastic thermal enhanced very thin small outline package ...
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NXP Semiconductors 6. Block diagram OSCI OSCILLATOR 32.768 kHz OSCO MONITOR POWER-ON RESET WATCH DOG 2 SDA I C INTERFACE SCL PCA8565 Fig 1. Block diagram of PCA8565 PCA8565_2 Product data sheet DIVIDER CONTROL 00h Control_1 ...
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... OSCI 1 10 OSCO 2 9 PCA8565BS INT 001aaj753 Transparent top view For mechanical details see Figure 29. Pin configuration of PCA8565BS (HVSON10) if floating pins are not allowed DD © NXP B.V. 2009. All rights reserved. n. CLKOUT SCL SDA ...
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NXP Semiconductors 8. Device protection diagram Fig 4. 9. Functional description The PCA8565 contains sixteen 8-bit registers with an auto-incrementing address register, an on-chip 32.768 kHz oscillator with one integrated capacitor, a frequency divider which provides the source clock for ...
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NXP Semiconductors 9.1 Register overview Table 4. Register overview and control bits default values Bit positions labeled as - are not implemented. Bit positions labeled as N should always be written with logic 0. Reset values are shown in Table ...
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NXP Semiconductors 9.2 Control registers 9.2.1 Register Control_1 Table 5. Bit Symbol 7 TEST1 STOP TESTC [1] Default value. [2] Bits labeled as N should always be written with logic ...
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NXP Semiconductors 9.3 Reset The PCA8565 includes an internal reset circuit which is active whenever the oscillator is stopped. In the reset state the I other registers are set according to Table 7. Address Register name 00h 01h 02h 03h ...
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NXP Semiconductors Table 9. Seconds value in decimal Table 10. Bit Symbol MINUTES [1] Values shown in decimal. Table 11. Bit Symbol 7 ...
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NXP Semiconductors Table 14. [1] Day Sunday Monday Tuesday Wednesday Thursday Friday Saturday [1] Definition may be re-assigned by the user. Table 15. Bit Symbol MONTHS [1] This bit may ...
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NXP Semiconductors Table 17. Bit Symbol YEARS [1] Values shown in decimal. 9.5 Data flow Figure 5 Fig 5. If the time registers are written or read by making individual access to the chip, ...
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NXP Semiconductors 3. Send a RESTART condition or STOP followed by START. 4. Send the slave address for read (A3h). 5. Read the register Seconds. 6. Read the register Minutes. 7. Read the register Hours. 8. Read the register Days. ...
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NXP Semiconductors 9.6.1 Alarm registers Table 18. Bit Symbol 7 AE_M MINUTE_ALARM [1] Default value. [2] Values shown in decimal. Table 19. Bit Symbol 7 AE_H HOUR_ALARM 3 to ...
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NXP Semiconductors Alarm registers which have their bit AE_x at logic 1 are ignored. Table 23 flags is made by a write command; therefore bits and 0 must be written with their previous values. Repeatedly re-writing ...
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NXP Semiconductors 9.7.1 Register Timer_control Table 24. Bit Symbol TD[1:0] [1] Default value. [2] These bits determine the source clock for the countdown timer; when not in use, TD[1:0] should be ...
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NXP Semiconductors TE COUNTDOWN COUNTER from interface: clear TF set alarm flag, AF from interface: clear AF When bits TIE and AIE are disabled, pin INT will remain high-impedance. Fig 8. Interrupt scheme 9.8.2 Bits TIE and AIE These bits ...
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NXP Semiconductors Table 27. Bit Symbol FD[1:0] [1] Default value. 9.10 Voltage-low detector The PCA8565 has an on-chip voltage-low detector. When V the Seconds register is set to indicate that the ...
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NXP Semiconductors The signal applied to pin CLKOUT should have a minimum pulse width of 300 ns and a minimum period of 1000 ns. The internal 64 Hz clock, now sourced from CLKOUT, is divided down ...
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NXP Semiconductors The STOP bit function will not affect the output of 32.768 kHz but will stop 1.024 kHz and 1 Hz. The lower two stages of the prescaler (F is asynchronous to the crystal oscillator, the accuracy ...
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NXP Semiconductors The first increment of the time circuits is between 0.507813 s and 0.507935 s after STOP bit is released. The uncertainty is caused by the prescaler bits F (see Table 9.13 Power-On Reset (POR) override The POR duration ...
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NXP Semiconductors 10. Characteristics of the I 2 The I C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a Serial Data Line (SDA) and a Serial Clock Line (SCL). Both lines must be ...
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NXP Semiconductors SDA SCL MASTER TRANSMITTER / RECEIVER Fig 15. System configuration 10.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by ...
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NXP Semiconductors 2 10.5 I C-bus protocol 10.5.1 Addressing Before any data is transmitted on the I addressed first. The addressing is always carried out with the first byte transmitted after the start procedure. The PCA8565 acts as a slave ...
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NXP Semiconductors acknowledgement from slave S SLAVE ADDRESS 0 A R/W Fig 19. Master reads after setting word address (write word address; read data) Fig 20. Master reads slave immediately after first byte (read mode) 10.5.3 Interface watchdog timer During ...
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NXP Semiconductors a. Correct data transfer: read or write b. Incorrect data transfer: read or write Fig 21. Interface watchdog timer PCA8565_2 Product data sheet WD timer WD timer running data valid slave address data time running time counters frozen ...
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NXP Semiconductors 11. Limiting values Table 29. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol tot T amb T stg V ESD I lu ...
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NXP Semiconductors 12. Characteristics 12.1 Static characteristics Table 30. Static characteristics specified. Symbol Parameter Supplies V supply voltage DD V low voltage low I supply current ...
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NXP Semiconductors 1 1.0 0 Timer = 1 minute; CLKOUT disabled. amb Fig 22 function 1 1.0 0.5 ...
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NXP Semiconductors 12.2 Dynamic characteristics Table 31. Dynamic characteristics specified. Symbol Parameter Oscillator C integrated load capacitance L(itg relative oscillator frequency variation osc osc ...
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NXP Semiconductors SDA SCL SDA Fig 26. I PCA8565_2 Product data sheet t t BUF LOW t HD;STA C-bus timing waveforms Rev. 02 — 16 June 2009 PCA8565 Real time clock/calendar HD;DAT t ...
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NXP Semiconductors 13. Application information Fig 27. Application diagram of PCA8565 13.1 Quartz frequency adjustment 13.1.1 Method 1: fixed OSCI capacitor By evaluating the average capacitance necessary for the application layout, a fixed capacitor can be used. The frequency is ...
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NXP Semiconductors 14. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT ...
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... A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION IEC SOT650 Fig 29. Package outline of SOT650-1 (HVSON10) of PCA8565BS PCA8565_2 Product data sheet (1) ( ...
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NXP Semiconductors 15. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 15.1 Introduction ...
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NXP Semiconductors 15.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including ...
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NXP Semiconductors Fig 30. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 16. Abbreviations Table 34. Acronym BCD CDM CMOS HBM ...
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NXP Semiconductors 17. Revision history Table 35. Revision history Document ID Release date PCA8565_2 20090616 • Modifications The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors • Legal texts have ...
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NXP Semiconductors 18. Legal information 18.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...