PCF2114AU/10 PHILIPS [NXP Semiconductors], PCF2114AU/10 Datasheet - Page 26

• Manufacturer Part Number: PCF2114AU/10
• Description: LCD controller/drivers
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
9.1
‘Clear display’ writes space code 20 (hexadecimal) into all
DDRAM addresses (The character pattern for character
code 20 must be blank pattern). Sets the DDRAM Address
Counter to logic 0. Returns display to its original position if
it was shifted. Thus, the display disappears and the cursor
or blink position goes to the left edge of the display
(the first line if 2 or 4 lines are displayed). Sets entry mode
I/D = logic 1 (increment mode). S of entry mode does not
change.
The instruction ‘Clear display’ requires extra execution
time. This may be allowed for by checking the busy-flag
(BF) or by waiting until 2 ms has elapsed. The latter must
be applied where no read-back options are foreseen, as in
some chip-on-glass (COG) applications.
9.2
‘Return home’ sets the DDRAM Address Counter to
logic 0. Returns display to its original position if it was
shifted. DDRAM contents do not change. The cursor or
blink position goes to the left of the display (the first line if 2
or 4 lines are displayed). I/D and S of entry mode do not
change.
9.3
9.3.1
When I/D = logic 1 (0) the DDRAM or CGRAM address
increments (decrements) by 1 when data is written into or
read from the DDRAM or CGRAM. The cursor or blink
position moves to the right when incremented and to the
left when decremented. The cursor and blink are inhibited
when the CGRAM is accessed.
9.3.2
When S = logic 1, the entire display shifts either to the right
(I/D = logic 0) or to the left (I/D = logic 1) during a DDRAM
write. Thus it looks as if the cursor stands still and the
display moves. The display does not shift when reading
from the DDRAM, or when writing into or reading out of the
CGRAM. When S = logic 0 the display does not shift.
9.4
9.4.1
The display is on when D = logic 1 and off when
D = logic 0. Display data in the DDRAM are not affected
and can be displayed immediately by setting D to logic 1.
1997 Apr 07
LCD controller/drivers
Clear display
Return home
Entry mode set
Display on/off control
I/D
S
D
26
9.4.2
The cursor is displayed when C = logic 1 and inhibited
when C = logic 0. Even if the cursor disappears, the
display functions I/D, etc. remain in operation during
display data write. The cursor is displayed using 5 dots in
the 8
9.4.3
The character indicated by the cursor blinks when
B = logic 1. The blink is displayed by switching between
display characters and all dots on with a period of
1 second when f
frequencies the blink period is equal to 150 kHz/f
The cursor and the blink can be set to display
simultaneously.
9.5
‘Cursor/display shift’ moves the cursor position or the
display to the right or left without writing or reading display
data. This function is used to correct a character or move
the cursor through the display. In 2 or 4-line displays, the
cursor moves to the next line when it passes the last
position (40 or 20 decimal) of the line. When the displayed
data is shifted repeatedly all lines shift at the same time;
displayed characters do not shift into the next line.
The Address Counter (AC) content does not change if the
only action performed is shift display, but increments or
decrements with the cursor shift.
9.6
9.6.1
Defines interface data width when the parallel data
interface is used.
Data is sent or received in bytes (bits DB7 to DB0) when
DL = logic 1, or in two 4-bit nibbles (DB7 to DB4) when
DL = logic 0. When 4-bit width is selected, data is
transmitted in two cycles using the parallel bus
When using the I
previously have been set to 0 using the parallel interface.
9.6.2
Sets number of display lines.
(1) In a 4-bit application DB3 to DB0 are left open (internal
pull-ups). Hence in the first ‘Function set’ instruction after
power-on, G and H are set to 1. A second ‘Function set’ must
then be sent (2 nibbles) to set G and H to their required
values.
th
line (see Fig.12).
Cursor/display shift
Function set
C
B
DL (
N, M
PARALLEL MODE ONLY
osc
2
C-bus interface the DL should not
= 150 kHz (see Fig.12). At other clock
PCF2116 family
)
Product specification
(1)
.
osc
.