TSA5060AT PHILIPS [NXP Semiconductors], TSA5060AT Datasheet - Page 5

• Manufacturer Part Number: TSA5060AT
• Description: 1.3 GHz I2C-bus controlled low phase noise frequency synthesizer
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
PINNING
FUNCTIONAL DESCRIPTION
The TSA5060A contains all the necessary elements
except a reference source, a loop filter and an external
NPN transistor to control a varicap tuned local oscillator
forming a phase locked loop frequency synthesized
source. The IC is designed in a high speed process with a
fast phase detector to allow a high comparison frequency
to reach a low phase noise level on the oscillator.
The block diagram is shown in Fig.1. The RF signal is
applied at pins RFA and RFB. The input preamplifier
provides a good sensitivity. The output of the preamplifier
is fed to the 17-bit programmable divider either through a
divide-by-two prescaler or directly. Because of the internal
high speed process, the RF divider is working at a
frequency up to 1.3 GHz, without the need for the
divide-by-two prescaler to be used.
The output of the 17-bit programmable divider f
into the phase comparator, where it is compared in both
phase and frequency with the comparison frequency f
This frequency is derived from the signal present at
pin XTAL, f
possible either to connect a quartz crystal to pin XTAL and
then using the on-chip crystal oscillator, or to feed this pin
with a reference signal from an external source.
The reference divider can have a dividing ratio selected
from 16 different values between 2 and 320, including the
2000 Oct 24
CP
XTAL
XT/COMP
AS
SDA
SCL
P3
P2
P1
P0
ADC
V
RFA
RFB
GND
DRIVE
SYMBOL
CC
1.3 GHz I
noise frequency synthesizer
xtal
, divided down in the reference divider. It is
PIN
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
2
C-bus controlled low phase
charge pump output
crystal oscillator input
f
I
I
I
general purpose output Port 3
general purpose input/output Port 2
general purpose input/output Port 1
general purpose input/output Port 0
analog-to-digital converter input
supply voltage
RF signal input A
RF signal input B
ground
external NPN drive output
xtal
2
2
2
C-bus address selection input
C-bus serial data input/output
C-bus serial clock input
or f
comp
DESCRIPTION
signal output
DIV
is fed
comp
.
5
ratio 24 to cope with the offset requirement of the UK-DTT
system, see Table 8.
The output of the phase comparator drives the
charge pump and the loop amplifier section. This amplifier
requires the use of an external NPN transistor. Pin CP is
the output of the charge pump, and pin DRIVE is
connected to the base of the external transistor. This
transistor has its emitter grounded and the collector drives
the tuning voltage to the varicap diode of the Voltage
Controlled Oscillator (VCO). The loop filter has to be
connected between pin CP and the collector of the
external NPN transistor (see Fig.4).
It is also possible to drive another PLL synthesizer, or the
clock input of a digital demodulation IC, from
pin XT/COMP. It is possible to select by software either
f
present after the reference divider. It is also possible to
switch off this output, in case it is not used.
For test and alignment purposes, it is possible to release
the drive output to be able to apply an external voltage on
it, to select one of the three charge pump test modes, and
to monitor half the f
possible modes.
Four open-collector output ports are provided on the IC for
general purpose; three of these can also be used as input
ports. A 3-bit ADC is also available.
handbook, halfpage
xtal
, the crystal oscillator frequency or f
XT/COMP
XTAL
SDA
SCL
CP
AS
P3
P2
Fig.2 Pin configuration.
DIV
1
2
3
4
5
6
7
8
at Port P0. See Table 10 for all
TSA5060A
FCE718
16
15
14
13
12
11
10
9
Product specification
DRIVE
GND
RFB
RFA
V CC
ADC
P0
P1
comp
TSA5060A
, the frequency