CS4228A-KS Cirrus Logic, CS4228A-KS Datasheet - Page 23

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CS4228A-KS

Manufacturer Part Number
CS4228A-KS
Description
24-Bit/ 96 kHz Surround Sound Codec
Manufacturer
Cirrus Logic
Datasheet

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5.5 DAC Mute1 Control
Address 0x04
MUT6 - MUT1
RMP1:0
5.6 DAC Mute2 Control
Address 0x05
MUTEC
MUTCZ
HMUTE56/34/12
DS511PP1
MUTEC
MUT6
7
1
7
1
MUTCZ
MUT5
Mute control for DAC6 - DAC1 respectively. When asserted, the corresponding DAC is digitally
attenuated to its maximum value (90.5 dB). When deasserted, the corresponding DAC atten-
uation value returns to the value stored in the corresponding Digital Volume Control register.
The attenuation value is ramped up and down at the rate specified by RMP1:0.
0 -
*1 -
Attenuation ramp rate.
*0 -
1 -
2 -
3 -
Controls the MUTEC pin
0 -
*1 -
Automatically asserts the MUTEC pin on consecutive zeros. When enabled, 512 consecutive
zeros on all six DAC inputs will cause the MUTEC pin to be asserted low. A single non-zero
value on any DAC input will cause the MUTEC pin to deassert.
*0 -
1 -
Hard mute the corresponding DAC pair. When asserted, zero data is sent to the corresponding
DAC pair causing an instantaneous mute. To prevent high frequency transients on the outputs,
a DAC pair should be fully attenuated by asserting the corresponding MUT6-MUT1 bits in the
DAC Mute Control register or by writing 0xFF to the corresponding Digital Volume Control reg-
isters before asserting HMUTE.
*0 -
1 -
6
1
6
0
Normal output level
Selected DAC output fully attenuated.
0.5 dB change per 4 LRCKs
0.5 dB change per 8 LRCKs
0.5 dB change per 16 LRCKs
0.5 dB change per 32 LRCKs
Normal operation
MUTEC pin asserted low
Disabled
Enabled
Normal operation
DAC pair is muted
MUT4
5
1
5
0
RESERVED
MUT3
4
1
4
0
HMUTE56
MUT2
3
1
3
0
HMUTE34
MUT1
2
1
2
0
HMUTE12
RMP1
1
0
1
0
CS4228A
RESERVED
RMP0
0
0
0
0
23

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