XC95144XV-4TQ144C Xilinx, XC95144XV-4TQ144C Datasheet

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XC95144XV-4TQ144C

Manufacturer Part Number
XC95144XV-4TQ144C
Description
High-Performance CPLD
Manufacturer
Xilinx
Datasheet
DS051 (v2.2) August 27, 2001
Features
Description
The XC95144XV is a 2.5V CPLD targeted for high-perfor-
mance, low-voltage applications in leading-edge communi-
cations and computing systems. It is comprised of eight
54V18 Function Blocks, providing 3,200 usable gates with
propagation delays of 4 ns.
DS051 (v2.2) August 27, 2001
Advance Product Specification
144 macrocells with 3,200 usable gates
Available in small footprint packages
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Optimized for high-performance 2.5V systems
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Advanced system features
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Fast concurrent programming
Slew rate control on individual outputs
Enhanced data security features
Excellent quality and reliability
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© 2001 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
100-pin TQFP (81 user I/O pins)
144-pin TQFP (117 user I/O pins)
144-pin CSP (117 user I/O pins)
Low power operation
Multi-voltage operation
In-system programmable
Two separate output banks
Superior pin-locking and routability with
FastCONNECT II™ switch matrix
Extra wide 54-input Function Blocks
Up to 90 product-terms per macrocell with
individual product-term allocation
Local clock inversion with three global and one
product-term clocks
Individual output enable per output pin
Input hysteresis on all user and boundary-scan pin
inputs
Bus-hold ciruitry on all user pin inputs
Full IEEE Standard 1149.1 boundary-scan (JTAG)
Endurance exceeding 10,000 program/erase
cycles
20 year data retention
ESD protection exceeding 2,000V
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
R
0
0
www.xilinx.com
1-800-255-7778
1
XC95144XV High-Performance
CPLD
Advance Product Specification
Power Estimation
Power dissipation in CPLDs can vary substantially depend-
ing on the system frequency, design application and output
loading. To help reduce power dissipation, each macrocell
in a XC9500XV device may be configured for low-power
mode (from the default high-performance mode). In addi-
tion, unused product-terms and macrocells are automati-
cally deactivated by the software to further conserve power.
For a general estimate of I
used:
I
Where:
MC
MC
MC = Total number of macrocells used
f = Clock frequency (MHz)
This calculation is based on typical operating conditions
using a pattern of 16-bit up/down counters in each Function
Block with no output loading. The actual I
with the design application and should be verified during
normal system operation.
Figure 1
CC
Figure 1: Typical I
HP
LP
(mA) =
MC
100
200
150
= Macrocells in low-power mode
50
= Macrocells in high-performance (default) mode
HP
0
shows the above estimation in a graphical form.
(0.36) + MC
40
CC
LP
Clock Frequency (MHz)
(0.23) + MC(0.005 mA/MHz) f
vs. Frequency for XC95144XV
CC
80
, the following equation may be
120
120 MHz
CC
160
value varies
DS051_01_012501
200 MHz
200
1

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XC95144XV-4TQ144C Summary of contents

Page 1

... ESD protection exceeding 2,000V Description The XC95144XV is a 2.5V CPLD targeted for high-perfor- mance, low-voltage applications in leading-edge communi- cations and computing systems comprised of eight 54V18 Function Blocks, providing 3,200 usable gates with propagation delays of 4 ns. © 2001 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm. ...

Page 2

... JTAG Port I/O I/O I/O I/O I/O I/O I/O I/O 3 I/O/GCK 1 I/O/GSR 4 I/O/GTS Function Block outputs (indicated by the bold line) drive the I/O Blocks directly. 2 JTAG In-System Programming Controller Controller I/O Blocks Figure 2: XC95144XV Architecture www.xilinx.com 1-800-255-7778 54 Function 18 Block 1 Macrocells Function 18 Block 2 Macrocells Function 18 Block 3 Macrocells ...

Page 3

... Program/Erase cycles (endurance Electrostatic Discharge (ESD) ESD DS051 (v2.2) August 27, 2001 Advance Product Specification Description (1) (1) Parameter o Commercial Industrial T = –40 A Parameter www.xilinx.com 1-800-255-7778 XC95144XV High-Performance CPLD Value –0.5 to 2.7 –0.5 to 3.6 –0.5 to 3.6 –0.5 to 3.6 –65 to +150 +260 +150 Min Max +70 C 2.37 2. +85 C 2.37 2.62 3.13 3 ...

Page 4

... XC95144XV High-Performance CPLD DC Characteristics (Over Recommended Operating Conditions) Symbol Parameter V Output high voltage for 3.3V outputs OH Output high voltage for 2.5V outputs Output high voltage for 1.8V outputs V Output low voltage for 3.3V outputs OL Output low voltage for 2.5V outputs Output low voltage for 1.8V outputs I Input leakage low current ...

Page 5

... DS051 (v2.2) August 27, 2001 Advance Product Specification Output Type V CCIO 3.3V 2. 1.8V Figure 3: AC Load Circuit XC95144XV-4 Min Max - 1.6 - 1.0 - 1.6 - 3 1.4 - 0.6 - 4.0 - 0.2 1.6 - 1.2 - 1 0.2 - 4.7 4.0 - 0.6 - 5.6 - 1.6 - 0.6 - 0.2 - 3.0 Advance Information www.xilinx.com 1-800-255-7778 XC95144XV High-Performance CPLD TEST 1 2 3.3V 320 360 2.5V 250 660 1.8V 10K 14K DS051_03_0601000 XC95144XV-5 XC95144XV-7 Min Max Min Max - 2.0 - 2.3 - 1.2 - 1.5 - 2.0 - 3.1 - 4.0 - 5.0 - 2 1.7 - 2.4 - 0.7 - 1.4 - 5.0 - 7 ...

Page 6

... XC95144XV High-Performance CPLD XC95144XV I/O Pins Function Macro- Block cell TQ100 TQ144 (1) ( ...

Page 7

... B9 129 126 123 - 8 D8 120 117 114 111 108 - 8 www.xilinx.com 1-800-255-7778 XC95144XV High-Performance CPLD BScan Macro- cell TQ100 TQ144 CS144 Order N12 L12 M13 L13 K10 8 ...

Page 8

... XC95144XV High-Performance CPLD XC95144XV Global, JTAG and Power Pins Pin Type I/O/GCK1 I/O/GCK2 I/O/GCK3 I/O/GTS1 I/O/GTS2 I/O/GTS3 I/O/GTS4 I/O/GSR TCK TDI TDO TMS V 2.5V CCINT V CCIO CCIO GND 21, 31, 44, 62, 69, 75, 84, No Connects 8 TQ100 TQ144 143 ...

Page 9

... Updated I and Internal Timing Parameters 08/27/01 2.2 Changed V added "low" current, I from 6.5 to 5.9. DS051 (v2.2) August 27, 2001 Advance Product Specification XC95144XV -7 TQ 100 C Package 100-pin Thin Quad Flat Pack (TQFP) 144-pin Thin Quad Flat Pack (TQFP) 144-ball Chip Scale Package (CSP) 100 Plastic TQFP TQ100 C, I ...

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