DAC56 Burr-Brown Corporation, DAC56 Datasheet - Page 4

• Manufacturer Part Number: DAC56
• Description: Monolithic 16-Bit Resolution DIGITAL-TO-ANALOG CONVERTER
• Manufacturer: Burr-Brown Corporation

OPERATING INSTRUCTIONS
The accuracy of a D/A converter is described by the transfer
function as shown in Figure 1. Digital input to analog output
converter relationships are shown in Table I. The errors in
the D/A converter are combinations of analog errors due to
the linear circuitry, matching and tracking properties of the
ladder and scaling networks, power supply rejection, and
reference errors. In summary, these errors consist of initial
errors including gain, offset, linearity, differential linearity,
and power supply sensitivity. Gain drift over temperature
rotates the line (Figure 1) about the bipolar zero point and
offset drift shifts the line left or right over the operating
temperature range. Most of the offset and gain drift is due to
the drift of the internal reference zener diode with tempera-
ture or time.
The converter is designed so that these drifts are in opposite
directions. This way the bipolar zero voltage is virtually
unaffected by variations in the reference voltage.
FIGURE 1. Input vs Output for an Ideal Bipolar D/A
TABLE I. Digital Input to Analog Output Relationship.
DIGITAL INPUT CODES
The DAC56 accepts serial input data (MSB first) in Binary
Two’s Complement form—Refer to Table I for input/output
relationships.
Complement (BTC)
(+FSR/2) –1LSB
* See Table I for digital code definitions.
DIGITAL INPUT
Binary Two’s
7FFF
FFFF
8000
0000
–FSR/2
H
H
H
H
®
Converter.
0111...1111
DAC56
DAC Output
Bipolar Zero
+ Full Scale
– Full Scale
Zero –1LSB
Offset
Drift
ANALOG OUTPUT
Digital Output
Voltage (V),
V
+2.999908
–3.000000
–0.000092
OUT
0.000000
Mode
Bipolar
Gain
Drift
Zero
Current (mA),
+1.000000
+0.030500 A
–0.999970
I
0.000000
OUT
1000...0000
Mode
All Bits
On
4
POWER SUPPLY CONNECTIONS
Power supply decoupling capacitors should be added as
shown in the Connection Diagram (Figure 2), for optimum
performance and noise rejection.
These capacitors (1 F tantalum recommended) should be
connected as close as possible to the converter.
FIGURE 2. Connection Diagram.
MSB ERROR ADJUSTMENT (OPTIONAL)
Differential linearity error at all codes of the DAC56 is
guaranteed to meet specifications without an external adjust-
ment. However, if adjustment of the differential linearity
error at bipolar zero is desired, it can be trimmed essentially
to zero using the circuit as shown in Figure 3.
FIGURE 3. MSB Adjustment Circuit.
After allowing ample warm-up time (5 to 10 minutes) to
assure stable operation, select the input code FFFF
sure the output voltage using a 6-1/2 digit voltmeter and
record the measurement. Change the digital input code to
0000
per C or less is recommended) to make the output voltage
read 1LSB more than the voltage reading of the previous
code (ex. 1LSB = 92 V at FSR = 6V).
If the MSB adjustment circuit is not used, pins 14 and 15
should be left open.
+5V
–5V
–5V
1µF
1µF
1µF
MSB Adjust 14
NOTES:
H
. Adjust the 100k
= Analog Common
= Logic Common
Trim 15
LCOM
Data
CLK
–V
+V
–V
NC
LE
S
L
L
1
2
3
4
5
6
7
8
16-Bit Serial
Conversion
DAC Latch
to Parallel
Logic and
470k
Control
Shifting
Circuit
16-Bit
Level
potentiometer (TCR of 100ppm
100k
16-Bit
DAC
I
OUT
(1)
NOTE: (1) 10-15 turns.
200k
16
15
14
13
12
11
10
9
(±3.0V)
+V
TRIM
MSB ADJ
I
ACOM
SJ
R
OUT
V
F
S
OUT
Analog
Output
1 –V
H
. Mea-
1µF
+5V
S