AD8566ARM Analog Devices, AD8566ARM Datasheet - Page 8

• Manufacturer Part Number: AD8566ARM
• Description: 16 V Rail-to-Rail Operational Amplifiers
• Manufacturer: Analog Devices

AD8565/AD8566/AD8567
APPLICATIONS
Theory of Operation
The AD856x family is designed to drive large capacitive loads in
LCD applications. It has high output current drive, rail-to-rail
input/output operation and is powered from a single 16 V supply.
It is also intended for other applications where low distortion and
high output current drive are needed.
Figure 1 illustrates a simplified equivalent circuit for the AD856x.
The rail-to-rail bipolar input stage is composed of two PNP
differential pairs, Q4–Q5 and Q10–Q11, operating in series with
diode protection networks, D1–D2. Diode network D1–D2
serves as protection against large transients for Q4–Q5, to
accommodate rail-to-rail input swing. D5–D6 protect Q10–Q11
against zenering. In normal operation, Q10–Q11 are off and their
input stage is buffered from the operational amplifier inputs by
Q6–D3 and Q8–D4. Operation of the input stage is best understood
as a function of applied common-mode voltage: When the inputs
of the AD856x are biased midway between the supplies, the
differential signal path gain is controlled by resistive loads (Via R9,
R10) Q4–Q5. As the input common-mode level is reduced toward
the negative supply (V
sources, I1 and I2, are forced into saturation, thereby forcing the
Q6–D3 and Q8–D4 networks into cutoff; However, Q4–Q5 remain
active, providing input stage gain. Inversely, when common-mode
input voltage is increased toward the positive supply, Q4–Q5 are
driven into cutoff, Q3 is driven into saturation, and Q4 becomes
active, providing bias to the Q10–Q11 differential pair. The point
at which Q10–Q11 differential pair becomes active is approximately
equal to (V
V+
Q6
Figure 1. AD856x Equivalent Input Circuit
POS
D3
I1
– 1 V).
Q4
R3
R9
D1
Q3
NEG
R1
C1
Q10
or GND), the input transistor current
R5
V
V
D6
POS
C2
D5
NEG
R6
Q11
Q4
R10
D2
R4
Q5
D4
I2
Q8
BIAS LINE
V–
FOLDED
CASCADE
–8–
The benefit of this type of input stage is low bias current. The
input bias current is the sum of base currents of Q4–Q5 and
Q6–Q8 over the range from (V
of this range, input bias current is dominated by the sum of base
current of Q10–Q11 for input signals close to V
(Q10–Q11) for signal close to V
the input bias current of AD856x not only exhibits different
amplitude, but also exhibits different polarities. Figure 2 provides
the characteristics of the input bias current versus common-mode
voltage. It is important to keep in mind that the source impedances
driving the AD856x inputs are balanced for optimum dc and ac
performance.
In order to achieve rail-to-rail output performance, the AD856x
design uses a complementary common-source (or gmRL) output.
This configuration allows output voltages to approach the power
supply rails, particularly if the output transistors are allowed to
enter the triode region on extremes of signal swing which are
limited by V
Also, this type of output stage exhibits voltage gain in an open-loop
gain configuration. The amount of gain depends on the total
load resistance at the output of the AD856x.
Input Overvoltage Protection
As with any semiconductor device, whenever the input exceeds
either supply voltages, attention needs to be paid to the input
overvoltage characteristics. As an overvoltage occurs, the amplifier
could be damaged, depending on the voltage level and the magnitude
of the fault current. When the input voltage exceeds either supply
by more than 0.6 V, internal pn junctions will allow current to
flow from the input to the supplies.
This input current is not inherently damaging to the device as
long as it is limited to 5 mA or less. If a condition exists using
the AD856x where the input exceeds the supply more than 0.6 V,
a series external resistor should be added. The size of the resistor
can be calculated by using the maximum overvoltage divided by
5 mA. This resistance should be placed in series with either input
exposed to an overvoltage.
Figure 2. AD856x Input Bias Current vs. Common-Mode
Voltage
–1,000
1,000
–200
–400
–600
–800
800
600
400
200
0
0
GS
V
T
, the transistor sizes, and output load current.
A
S
= 25 C
= 16V
2
INPUT COMMON-MODE VOLTAGE – V
4
6
NEG
POS
+ 1 V) to (V
8
. From this type of design,
10
NEG
POS
12
– 1 V). Outside
and of Q6–Q8
14
REV. A
16