DAC1006 National Semiconductor, DAC1006 Datasheet - Page 6

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DAC1006

Manufacturer Part Number
DAC1006
Description
P Compatible/ Double-Buffered D to A Converters
Manufacturer
National Semiconductor
Datasheet

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1 0 DEFINITION OF PACKAGE PINOUTS
1 1 Control Signals (All control signals are level actuated )
CS Chip Select
WR Write
data bits (DI) into the input latch The data in the input latch
is latched when WR is high The 10-bit input latch is split
into two latches one holds 8 bits and the other holds 2 bits
The Byte1 Byte2 control pin is used to select both input
latches when Byte1 Byte2
latch when in the low state
Byte1 Byte2 Byte Sequence Control
is high all ten locations of the input latch are enabled When
low only two locations of the input latch are enabled and
these two locations are overwritten on the second byte
write On the DAC1006 1007 and 1008 the Byte1 Byte2
must be low to transfer the 10-bit data in the input latch to
the DAC register
XFER Transfer Control Signal active low
combination with others is used to transfer the 10-bit data
which is available in the input latch to the DAC register
see timing diagrams
1 2 Other Pin Functions
DI
(LSB) and DI
I
digital input code of all 1s and is zero for a digital input code
of all 0s
I
I
I
where R j 15 k
OUT1
OUT2
OUT1
OUT1
i
(i
e
a
0 to 9) Digital Inputs
or
DAC Current Output 1
DAC Current Output 2
I
OUT2
a End Point Test After Zero and FS Adj
g
e
The active low WR is used to load the digital
is the most significant bit (MSB)
1023 V
1024 R
active low it will enable WR
REF
e
1 or to overwrite the 2-bit input
DI
I
0
I
OUT2
OUT1
is the least significant bit
is a constant minus
is a maximum for a
When this control
This signal in
6
DAC transfer characteristic It is measured after adjusting
R
for use as the shunt feedback resistor when an external op
amp is used to provide an output voltage for the DAC This
on-chip resistor should always be used (not an external re-
sistor) because it matches the resistors used in the on-chip
R-2R ladder and tracks these resistors over temperature
V
the external precision voltage source which drives the R-2R
ladder V
the analog voltage input for a 4-quadrant multiplying DAC
application
V
for the part V
optimum for
independent of V
tics and Description in Section 3 0 T
inputs )
GND Ground
1 3 Definition of Terms
Resolution Resolution is directly related to the number of
switches or bits within the DAC For example the DAC1006
has 2
Linearity Error Linearity error is the maximum deviation
from a straight line passing through the endpoints of the
for zero and full-scale Linearity error is a parameter intrinsic
to the device and cannot be externally adjusted
National’s linearity test (a) and the ‘‘best straight line’’ test
(b) used by other suppliers are illustrated below The ‘‘best
straight line’’ requires a special zero and FS adjustment for
each part which is almost impossible for user to determine
The ‘‘end point test’’ uses a standard zero and FS adjust-
ment procedure and is a much more stringent test for DAC
linearity
Power Supply Sensitivity Power supply sensitivity is a
measure of the effect of power supply changes on the DAC
full-scale output (which is the worst case)
FB
REF
CC
Feedback Resistor
Digital Supply Voltage
10
Reference Voltage Input
or 1024 steps and therefore has 10-bit resolution
REF
a
can range from
CC
15V The input threshold voltages are nearly
can be from
CC
the ground pin for the part
b Best Straight Line
(See Typical Performance Characteris-
This is provided on the IC chip
b
a
10 to
This is the power supply pin
5 to
This is the connection for
a
a
15 V
10 volts This is also
2
L compatible logic
DC
Operation is
TL H 5688 – 8

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