X9251 Xicor, X9251 Datasheet - Page 4

• Manufacturer Part Number: X9251
• Description: Quad Digitally-Controlled (XDCP) Potentiometer
• Manufacturer: Xicor

X9251
PIN CONFIGURATION
PIN ASSIGNMENTS
Note 1: A0–A1 device address pins must be tied to a logic level.
REV 1.3.3 2/10/04
(SOIC)
6, 19
Pin
10
11
12
13
14
15
16
17
18
20
21
22
23
24
1
2
3
4
5
7
8
9
R
R
V
R
R
R
R
WP
SO
NC
CS
W3
W0
A0
CC
H3
H0
L3
L0
D1, D4
(CSP)
10
11
12
1
2
3
4
5
6
7
8
9
SOIC/TSSOP
Pin
D2
C1
C2
C3
C4
D3
E2
F2
F1
E1
B1
A1
A2
B2
B3
A3
A4
B4
E4
F4
F3
E3
X9251
24
23
22
21
20
19
18
17
16
15
14
13
Symbol
HOLD
R
R
R
R
SCK
V
R
R
R
V
R
HOLD
SCK
R
R
R
NC
V
R
R
R
A1
SI
R
R
WP
R
R
SO
CS
NC
A0
A1
SI
SS
W3
CC
W0
W1
W2
L2
H2
W2
W1
H1
L1
SS
H3
H0
H1
H2
L3
L0
L1
L2
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Serial Data Output for SPI bus
Device Address for SPI bus. (See Note 1)
Wiper Terminal of DCP3
High Terminal of DCP3
Low Terminal of DCP3
System Supply Voltage
Low Terminal of DCP0
High Terminal of DCP0
Wiper Terminal of DCP0
SPI bus. Chip Select active low input
Hardware Write Protect – active low
Serial Data Input for SPI bus
Device Address for SPI bus. (See Note 1)
Low Terminal of DCP1
High Terminal of DCP1
Wiper Terminal of DCP1
System Ground
Wiper Terminal of DCP2
High Terminal of DCP2
Low Terminal of DCP2
Serial Clock for SPI bus
Device select. Pauses the SPI serial bus.
No Connect
A
B
C
D
E
F
R
R
V
NC
R
R
1
W0
L0
CC
L3
W3
Top View–Bumps Down
Function
Characteristics subject to change without notice.
R
R
WP
SO
CS
A
2
H0
H3
0
CSP
HOLD
SCK
R
R
A
SI
3
H1
H2
1
R
R
V
R
R
NC
W1
W2
SS
4
L1
L2
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