AD1862N-J Analog Devices, AD1862N-J Datasheet - Page 6

• Manufacturer Part Number: AD1862N-J
• Description: Ultralow Noise 20-Bit Audio DAC
• Manufacturer: Analog Devices

AD1862
Analog Circuit Considerations
GROUNDING RECOMMENDATIONS
The AD1862 has two ground pins, designated analog ground
(AGND) and digital ground (DGND). The analog ground pin
is the “high-quality” ground reference for the device. The ana-
log ground pin should be connected to the analog common
point in the system. The reference bypass capacitor, the nonin-
verting terminal of the current-to-voltage conversion op amp,
and any output loads should be connected to this point. The
digital ground pin returns ground current from the digital logic
portions of the AD1862 circuitry. This pin should be connected
to the digital common point in the system.
As illustrated in Figure 7, AGND and DGND should be con-
nected together at one point in the system.
POWER SUPPLIES AND DECOUPLING
The AD1862 has four power supply input pins. V
supply voltages which operate the linear portions of the DAC in-
cluding the voltage reference and control amplifier. The V
supplies are designed to operate with 12 volts.
The V
ing the input shift register, the input latching circuitry and the
TTL-to-CMOS level shifters. The V
be operated from 5 V to 12 V supplies subject only to the
limitation that –V
Decoupling capacitors should be used on all power supply input
pins. Good engineering practice suggests that these capacitors
be placed as close as possible to the package pins and the com-
mon points. The logic supplies, V
DGND and the analog supplies, V
AGND.
EXTERNAL NOISE REDUCTION COMPONENTS
Two external capacitors are required to achieve low-noise opera-
tion. Their correct connection is illustrated in Figure 8. Capacitor
C1 is connected between the pin labeled NR1 and analog com-
mon. C1 forms a low-pass filter element which reduces noise con-
Figure 7. Grounding and Bypassing Recommendations
L
supplies operate the digital portions of the chip includ-
L
may not be more negative than –V
4
1
2
3
5
6
7
8
(Not to Scale)
TOP VIEW
AD1862
L
16
15
14
13
12
10
11
S
, should be decoupled to
9
, should be decoupled to
L
supplies are designed to
DGND
AGND
S
provide the
S
.
S
–6–
tributed by the voltage reference circuitry. The proper choice for
this capacitor is a tantalum type with value of 10 F or more. This
capacitor should be connected to the package pins as closely as
possible. This will minimize the effects of parasitic inductance of
the leads and connections circuit connections.
Capacitor C2 is connected between the pin labeled NR2 and the
negative analog supply, –V
of output noise contributed by the control amplifier circuitry.
C2 should be chosen to be a tantalum capacitor with a value of
about 1 F. Again, the connections between the AD1862 and
C2 should be made as short as possible.
The recommended values for C1 and C2 are 10 F and 1 F,
respectively. The ratio between C1 and C2 should be approxi-
mately 10. Additional noise reduction can be gained by choos-
ing slightly higher values for C1 and C2 such as 22 F and
2.2 F. Figure 2 illustrates the noise performance of the
AD1862 with 10 F and 1 F.
EXTERNAL AMPLIFIER CONNECTIONS
The AD1862 is a current-output D/A converter. Therefore, an
external amplifier, in combination with the on-board feedback
resistor, is required to derive an output voltage. Figure 9 illus-
trates the proper connections for an external operational ampli-
fier. The output of the AD1862 is intended to drive the
summing junction of an external current-to-voltage conversion
op amp. Therefore, the voltage on the output current pin of the
AD1862 should be approximately the same as that on the
AGND pin of the device.
The on-board 3 k feedback resistor and the 1 mA output
current typically have 1% tolerance or less. This makes the
choice of external components very simple and eliminates addi-
tional trimming. For example, if a user wishes to derive an out-
put voltage higher than the 3 V swing offered by the output
current and feedback resistor combination, all that is required is
to combine a standard value resistor with the feedback resistor
to achieve the appropriate output voltage swing. This technique
can be extended to include the choice of elements in the
deemphasis network, etc.
Figure 8. Noise Reduction Capacitors
ANALOG
SUPPLY
–12V
NOTE:
PIN 1 IS "HIGH QUALITY" RETURN
FOR BIAS CAP.
S
. This capacitor reduces the portion
1
2
3
4
5
6
7
8
AD1862
TOP VIEW
(Not to
Scale)
16
15
14
13
12
11
10
9
+
+
C2
C1
REV. A