M48T248V ST Microelectronics, M48T248V Datasheet
M48T248V
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M48T248V Summary of contents
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... AUTOMATIC SWITCH-OVER and DESELECT CIRCUITRY CHOICE OF POWER-FAIL DESELECT VOLTAGES Power-fail Deselect Voltage): PFD – M48T248Y: 4.25V V PFD – M48T248V: 2.80V V PFD FULL 10% V OPERATING RANGE CC OVER 10 YEARS’ DATA RETENTION IN THE ABSENCE OF POWER WATCH FUNCTION IS TRANSPARENT TO RAM OPERATION 128K SRAM DIRECTLY REPLACES ...
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... WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 6. Memory READ Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 7. Memory WRITE Cycle Figure 8. Memory WRITE Cycle Table 7. Memory AC Characteristics, M48T248Y . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 8. Memory AC Characteristics, M48T248V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Data Retention Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 9. Power Down/Up Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 9. Power Down/Up Trip Points DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 PHANTOM CLOCK OPERATION Figure 10. Comparison Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Clock Register Information ...
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... Zero Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 10. Phantom Clock Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 11. Phantom Clock READ Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 12. Phantom Clock WRITE Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 13. Phantom Clock Reset Table 11. Phantom Clock AC Characteristics (M48T248Y Table 12. Phantom Clock AC Characteristics (M48T248V PACKAGE MECHANICAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 REVISION HISTORY M48T248Y, M48T248V 3/24 ...
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... M48T248Y, M48T248V SUMMARY DESCRIPTION The M48T248Y/V TIMEKEEPER 128Kbit x 8 non-volatile static RAM and real time clock organized as 131,072 words by 8 bits. The special DIP package provides a fully integrated battery back-up memory and real time clock solu- tion. In the event of power instability or absence, a ...
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... Figure 4. Block Diagram CE OE CONTROL LOGIC WE RST ACCESS ENABLE SEQUENCE DETECTOR DQ0 BUFFERS XO 32.768 Hz CRYSTAL XI READ WRITE POWER FAIL I/O DATA POWER-FAIL V CC DETECT LOGIC V BAT M48T248Y, M48T248V CLOCK/CALENDAR LOGIC UPDATE TIMEKEEPER REGISTER A0–A16 SRAM DQ0–DQ7 COMPARISON REGISTER INTERNAL V CC AI04238 5/24 ...
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... M48T248Y, M48T248V MAXIMUM RATING Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicat the Operating sections of this specification is Table 2 ...
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... Input and Output Timing Ref. Voltages Note: Output High Z is defined as the point where data is no longer driven (see Table 3, page 7). Figure 5. AC Testing Load Circuit DEVICE UNDER TEST 680 Note: 50pF for M48T248V. Table 4. Capacitance Symbol Parameter C Input Capacitance IN (3) ...
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... M48T248Y, M48T248V Table 5. DC Characteristics Sym Parameter (2) Input Leakage Current Output Leakage Current Supply Current CC1 Supply Current (TTL I CC2 Standby) V Power Supply CC I CC3 Current (3) Input Low Voltage V IL (3) Input High Voltage Output Low Voltage OL V Output High Voltage ...
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... The OE control signal should be kept high (inactive) during the WRITE cycles to avoid bus contention and OE are low (ac- (for OE) in- tive), WE will disable the outputs for Output Data OE WRITE Time (t tRC tACC tCO tOE tCOE M48T248Y, M48T248V WE DQ7-DQ0 Power X High-Z Standby V D Active IL IN ...
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... M48T248Y, M48T248V Figure 7. Memory WRITE Cycle 1 ADDRESSES CE WE DQ0–DQ7 Note during a WRITE cycle, the output buffers remain in a high impedance state the CE low transition occurs simultaneously with or later than the WE low transition in WRITE Cycle 1, the output buffers remain in a high impedance state during this period ...
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... WRITE cycle, the output buffers remain in a high impedance state low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain in a high impedance state during this period. tWC tAW tWP tODW tCOE tDS DATA IN STABLE M48T248Y, M48T248V tWR tOEW tDH AI04232 11/24 ...
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... M48T248Y, M48T248V Table 7. Memory AC Characteristics, M48T248Y Symbol t t READ Cycle Time AVAV Access Time AVQV ACC t t Chip Enable Low to Output Valid ELQV Output Enable Low to Output Valid GLQV OE t ELQX Chip Enable or Output Enable Low to Output Transition t COE ...
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... Table 8. Memory AC Characteristics, M48T248V Symbol t t READ Cycle Time AVAV Access Time AVQV ACC t t Chip Enable Low to Output Valid ELQV Output Enable Low to Output Valid GLQV OE t ELQX Chip Enable or Output Enable Low to Output Transition t COE t GLQX t t Output Hold from Address Change ...
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... M48T248Y, M48T248V Data Retention Mode Data can be read or written only when V greater than V . When V PFD CC point at which write protection occurs), the clock registers and the SRAM are blocked from any ac- cess. When V falls below the Battery Switch CC Over threshold (V ), the device is switched from ...
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... Phantom Clock are also writing data to a location in the mated RAM. The preferred way to manage this requirement is to set M48T248Y, M48T248V aside just one address location in RAM as a Phan- tom Clock scratch pad. When the first WRITE cycle is executed com- pared to Bit 1 of the 64-bit comparison register ...
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... M48T248Y, M48T248V Figure 10. Comparison Register Definition 7 BYTE 0 1 BYTE 1 0 BYTE BYTE 3 BYTE 4 1 BYTE 5 0 BYTE 6 1 BYTE 7 0 Note: The odds of this pattern being accidentally duplicated and sending aberrant entries to the RTC is less than sent to the clock LSB to MSB. ...
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... D2 0.01 Seconds Seconds 10 / Hrs Hours (24 Hour Format) A/P OSC RST 0 10 date Date: Day of the Month 0 10M RST = Reset Bit 0 = Must be set to '0' M48T248Y, M48T248V Function/Range BCD Format D1 D0 Seconds Seconds Minutes Minutes Hours Day of the Week Day Date Month Month Year Year ...
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... M48T248Y, M48T248V Figure 11. Phantom Clock READ Cycle tCOE Q Figure 12. Phantom Clock WRITE Cycle Figure 13. Phantom Clock Reset RST 18/24 tRC tCW tCO tOW tOE tOEE DATA OUTPUT VALID tWC tWP tCW tDS DATA INPUT STABLE tRST tRR tOD tODO ...
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... going high (1) Min Parameter 70° 4.5 to 5.5V or 3.0 to 3.6V (except where noted measured from the latter going low to the earlier M48T248Y, M48T248V Typ Max Unit ...
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... M48T248Y, M48T248V Table 12. Phantom Clock AC Characteristics (M48T248V) Symbol t t READ Cycle Time AVAV Access Time ELQV Access Time GLQV Output Low Z ELQX COE Output Low Z GLQX OEE ( Output High Z t EHQZ ...
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... Typ Min Max 9.27 9.52 0.38 – 0.43 0.59 0.20 0.33 42.42 43.18 18.03 18.80 2.29 2.79 34.29 41.91 14.99 16.00 3.05 3.81 1.91 2.79 32 M48T248Y, M48T248V C eA PMDIP inches Typ Min Max 0.365 0.375 0.015 – 0.017 0.023 0.008 0.013 1.670 1.700 0.710 0.740 0.090 0.110 1.350 1.650 0.590 0.630 0.120 0.150 0.075 0.110 32 21/24 ...
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... PFD 248V = V = 3.0 to 3.6V 2.80 to 2.97V CC PFD Speed –70 = 70ns (M48T248Y) –85 = 85ns (M48T248V) Package PM = PMDIP32 Temperature Range 70°C Shipping Method for SOIC blank = Tubes TR = Tape & Reel For a list of available options (e.g., Speed, Package) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you ...
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... REVISION HISTORY Table 15. Document Revision History Date Rev. # June 2001 1.0 First Issue 28-Mar-03 2.0 v2.2 template applied; test condition updated (Table 9) M48T248Y, M48T248V Revision Details 23/24 ...
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