MK2771-13S Integrated Circuit Systems, MK2771-13S Datasheet - Page 3

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MK2771-13S

Manufacturer Part Number
MK2771-13S
Description
VCXO and Set-Top Clock Source
Manufacturer
Integrated Circuit Systems
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK2771-13S
Manufacturer:
MICROCLOCK
Quantity:
20 000
MDS 2771-13 A
Electrical Specifications
External Components
The MK2771-13 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.1µF should be connected between VDD and GND on pins 4 and 7, 6 and 7, and 15 and
14, as close to the MK2771-13 as possible. A series termination resistor of 33 may be used for each clock
output.The 13.500 MHz crystal must be connected as close to the chip as possible. The crystal should be a
parallel mode, pullable, with load capacitance of 14pF. Consult MicroClock for recommended suppliers.
See MAN05 for recommended layout of the chip and external components.
Notes:
Parameter
ABSOLUTE MAXIMUM RATINGS (note 1)
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
DC CHARACTERISTICS (VDD = 5.0V unless noted)
DC CHARACTERISTICS (VDD = 5.0V unless noted)
Operating Voltage, VDD
Input High Voltage, VIH, X1 pin only
Input Low Voltage, VIL, X1 pin only
Input High Voltage, VIH (except PCS1)
Input Low Voltage, VIL (except PCS1)
Input High Voltage, VIH, PCS1 only
Input Low Voltage, VIL, PCS1 only
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH, CMOS level
Operating Supply Current, IDD
Short Circuit Current
Input Capacitance
Frequency synthesis error
VIN, VCXO control voltage
AC CHARACTERISTICS (VDD = 5.0V unless noted)
AC CHARACTERISTICS (VDD = 5.0V unless noted)
Input Frequency
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Maximum Absolute Jitter, short term
Skew of 27 MHz outputs
27 MHz output pullability, note 3
Integrated Circuit Systems • 525 Race Street•San Jose•CA•95126•(408)295-9800tel•www.icst.com
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
2. With PCLK at 50 MHz.
3. With a pullable crystal that conforms to ICS’ specifications
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
Conditions
Referenced to GND
Referenced to GND
Max of 10 seconds
IOH=-25mA
IOL=25mA
IOH=-8mA
No Load, note 2
Each output
All clocks
0.8 to 2.0V
2.0 to 0.8V
At 1.4V
Rising edges at 1.4V
0V
VIN
3
3V
VCXO and Set-Top Clock Source
Minimum
VDD-0.5
VDD-0.4
4.75
-500
-0.5
-65
3.5
2.4
40
0
2
0
Revision 110298
13.500000
Typical
±100
±100
200
2.5
2.5
60
7
0
Maximum
VDD+0.5
MK2771-13
5.25
260
150
500
1.5
0.8
0.5
0.4
1.5
1.5
70
60
7
0
3
Printed 11/16/00
Units
MHz
ppm
ppm
mA
mA
°C
°C
°C
pF
%
V
V
V
V
V
V
V
V
V
V
V
V
V
ns
ns
ps
ps

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