LTC1863 LINER [Linear Technology], LTC1863 Datasheet - Page 12

• Manufacturer Part Number: LTC1863
• Description: 12-/16-Bit, 8-Channel 200ksps ADCs
• Manufacturer: LINER [Linear Technology]

LTC1863/LTC1867
APPLICATIO S I FOR ATIO
where V
quency and V
second through Nth harmonics.
Internal Reference
The LTC1863/LTC1867 has an on-chip, temperature com-
pensated, curvature corrected, bandgap reference that is
factory trimmed to 2.5V. It is internally connected to a
reference amplifier and is available at V
resistor is in series with the output so that it can be easily
overdriven by an external reference if better drift and/or
accuracy are required as shown in Figure 4. The reference
amplifier gains the V
REFCOMP (Pin 9). This reference amplifier compensation
pin, REFCOMP, must be bypassed with a 10 F ceramic or
tantalum in parallel with a 0.1 F ceramic for best noise
performance.
12
2.5V
4.096V
Figure 4b. Using the LT1019-2.5 as an External Reference
1
is the RMS amplitude of the fundamental fre-
2.2 F
10 F
LT1019A-2.5
10
15
Figure 4a. LT1867 Reference Circuit
9
V
5V
2
IN
V
REFCOMP
GND
V
REF
through V
OUT
+
U
REF
10 F
voltage by 1.638V to 4.096V at
R3
U
N
REFERENCE
R2
are the amplitudes of the
AMP
2.2 F
0.1 F
10
15
9
W
V
REFCOMP
GND
REF
LTC1863/
LTC1867
REF
R1
6k
LTC1863/LTC1867
(Pin 10). A 6k
REFERENCE
1867 F04b
BANDGAP
U
1867 F04a
Digital Interface
The LTC1863/LTC1867 have very simple digital interface
that is enabled by the control input, CS/CONV. A logic
rising edge applied to the CS/CONV input will initiate a
conversion. After the conversion, taking CS/CONV low will
enable the serial port and the ADC will present digital data
in two’s complement format in bipolar mode or straight
binary format in unipolar mode, through the SCK/SDO
serial port.
Internal Clock
The internal clock is factory trimmed to achieve a typical
conversion time of 3 s and a maximum conversion time,
3.5 s, over the full operating temperature range. The
typical acquisition time is 1.1 s, and a throughput sam-
pling rate of 200ksps is tested and guaranteed.
Automatic Nap Mode
The LTC1863/LTC1867 go into automatic nap mode when
CS/CONV is held high after the conversion is complete.
With a typical operating current of 1.3mA and automatic
150 A nap mode between conversions, the power dissi-
pation drops with reduced sample rate. The ADC only
keeps the V
part is in the automatic nap mode. The slower the sample
rate allows the power dissipation to be lower (see
Figure 5).
REF
2.0
1.5
1.0
0.5
Figure 5. Supply Current vs f
0
1
and REFCOMP voltages active when the
V
DD
= 5V
10
f
SAMPLE
(ksps)
100
SAMPLE
18637 G10
1000
18637f