LTC1694 LINER [Linear Technology], LTC1694 Datasheet - Page 7

• Manufacturer Part Number: LTC1694
• Description: SMBus/I2C Accelerator
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
PACKAGE DESCRIPTIO
ACK Data Setup Time
The data setup time requirement for ACK (acknowledge)
must be fulfilled if a high value of R
edge is accomplished by the SMBus host releasing the
SDA line (pulling high) at the end of the last bit sent and the
SMBus slave device pulling the SDA line low before the
rising edge of the ACK clock pulse.
The LTC1694 2.2mA boosted pull-up current is activated
when the SMBus host releases the SDA line, allowing the
voltage to rise above the LTC1694’s comparator threshold
of 0.65V. If an SMBus slave device has a high value of R
U
U
(0.014 – 0.022)
0.35 – 0.55
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DIMENSIONS ARE INCLUSIVE OF PLATING
3. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
4. MOLD FLASH SHALL NOT EXCEED 0.254mm
5. PACKAGE EIAJ REFERENCE IS SC-74A (EIAJ)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S
W
is used. An acknowl-
U
(0.059 – 0.069)
(0.102 – 0.118)
Dimensions in inches (millimeters) unless otherwise noted.
1.50 – 1.75
2.60 – 3.00
U
(LTC DWG # 05-08-1633)
5-Lead Plastic SOT-23
(0.004 – 0.008)
0.09 – 0.20
(0.110 – 0.118)
(NOTE 2)
S5 Package
2.80 – 3.00
S
(NOTE 3)
,
(0.00 – 0.006)
0.00 – 0.15
a longer time is required for this SMBus slave device to pull
SDA low before the rising edge of the ACK clock pulse.
To ensure sufficient data setup time for ACK, SMBus slave
devices, with high values of R
earlier. Typically, a minimum setup time of 1.5 s is needed
for an SMBus device with an R
capacitance of 200pF.
An alternative is that the SMBus slave device can hold SCL
line low until the SDA line reaches a stable state. Then, SCL
can be released to generate the ACK clock pulse.
(0.074)
1.90
REF
FIVE PLACES (NOTE 2)
(0.014 – 0.020)
0.35 – 0.50
(0.037)
0.95
REF
(0.035 – 0.057)
(0.035 – 0.051)
0.90 – 1.45
0.90 – 1.30
S5 SOT-23 0599
S
, should pull the SDA low
S
of 700
LTC1694
and a bus
7