LTC1453 LINER [Linear Technology], LTC1453 Datasheet - Page 6

• Manufacturer Part Number: LTC1453
• Description: 12-Bit Rail-to-Rail Micropower DACs in SO-8
• Manufacturer: LINER [Linear Technology]

BLOCK DIAGRA
CLK: The TTL Level Input for the Serial Interface Clock.
D
on the D
edge of the serial clock.
CS/LD: The TTL Level Input for the Serial Interface Enable
and Load Control. When CS/LD is low the CLK signal is
enabled, so the data can be clocked in. When CS/LD is
pulled high, data is loaded from the shift register into the
DAC register, updating the DAC output.
D
Valid on the Rising Edge of the Serial Clock.
LTC1451
LTC1452/LTC1453
PI FU CTIO S
TI I G DIAGRA
6
IN
OUT
W
U
: The TTL Level Input for the Serial Interface Data. Data
: The Output of the Shift Register which Becomes
U
IN
U
pin is latched into the shift register on the rising
CS/LD
D
OUT
CLK
D
IN
CS/LD
D
U
CLK 1
OUT
D
PREVIOUS WORD
IN
2
3
4
B0
W
W
t
9
PREVIOUS WORD
B11
REGISTER
12-BIT
SHIFT
t
1
POWER-ON
RESET
MSB
B11
t
2
REGISTER
DAC
LD
B10
t
8
B10
LTC1451: 2.048V
LTC1453: 1.22V
REFERENCE
GND: Ground.
REF: The Output of the Internal Reference and the Input
to the DAC Resistor Ladder. An external reference with
voltage up to V
V
V
(LTC1451), 2.7
quires a bypass capacitor to ground.
OUT
CC
12-BIT DAC
t
: The Positive Supply Input. 4.5V
4
: The Buffered DAC Output.
CC
B1
/2 may be used for the LTC1452.
V
–
+
CC
B1
t
3
5.5V (LTC1452/LTC1453). Re-
B0
t
6
5
8
7
6
11451/2/3 BD
V
V
REF
GND
CC
OUT
LSB
B0
CURRENT WORD
t
5
B11
t
7
1451/2/3 TD
V
CC
5.5V