MC74HC14ADTR2G ON Semiconductor, MC74HC14ADTR2G Datasheet - Page 5

• Manufacturer Part Number: MC74HC14ADTR2G
• Description: IC INVERTER HEX SCHMITT 14TSSOP
• Manufacturer: ON Semiconductor
• Series: 74HCr

Specifications of MC74HC14ADTR2G

• Logic Type: Inverter with Schmitt Trigger
• Number Of Inputs: 1
• Number Of Circuits: 6
• Current - Output High, Low: 5.2mA, 5.2mA
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Logical Function: Inverter Schmit Trig
• Logic Family: HC
• Number Of Elements: 6
• Input Type: Schmitt Trigger
• High Level Output Current: -5.2mA
• Low Level Output Current: 5.2mA
• Propagation Delay Time: 110ns
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Package Type: TSSOP
• Operating Temp Range: -55C to 125C
• Pin Count: 14
• Quiescent Current: 1uA
• Output Type: Schmitt Trigger
• Technology: CMOS
• Mounting: Surface Mount
• Operating Temperature Classification: Military
• Operating Supply Voltage (max): 6V
• Operating Supply Voltage (min): 2V
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2 V to 6 V
• Output Level: CMOS, NMOS, TTL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC74HC14ADTR2GOSTR

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
* Used to determine the no−load dynamic power consumption: P
AC CHARACTERISTICS
ON Semiconductor High−Speed CMOS Data Book (DL129/D).
Symbol
t
t
t
t
C
PLH
TLH
PHL
C
THL
PD
in
Semiconductor High−Speed CMOS Data Book (DL129/D).
,
,
Power Dissipation Capacitance (Per Inverter)*
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 2)
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
Maximum Input Capacitance
(C
L
OUTPUT Y
= 50pF, Input t
INPUT A
Parameter
90%
50%
r
= t
10%
t
PLH
t
TLH
*Includes all probe and jig capacitance
f
Figure 1. Switching Waveforms
= 6ns)
10%
50%
Figure 2. Test Circuit
DEVICE
http://onsemi.com
UNDER
90%
TEST
t
f
D
= C
5
t
OUTPUT
PD
r
V
CC
2
f + I
POINT
TEST
V
2.0
3.0
4.5
6.0
2.0
3.0
4.5
6.0
V
CC
CC
C
L
V
*
CC
−55 to 25°C
Typical @ 25°C, V
t
. For load considerations, see Chapter 2 of the
PHL
75
30
15
13
75
27
15
13
10
t
THL
Guaranteed Limit
V
GND
CC
22
≤85°C
95
40
19
16
95
32
19
16
10
CC
= 5.0 V
≤125°C
110
110
55
22
19
36
22
19
10
Unit
pF
pF
ns
ns