PSMN2R0-30YL_10 NXP [NXP Semiconductors], PSMN2R0-30YL_10 Datasheet - Page 2

• Manufacturer Part Number: PSMN2R0-30YL_10
• Description: N-channel TrenchMOS logic level FET
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
2. Pinning information
Table 2.
3. Ordering information
Table 3.
4. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
PSMN2R0-30YL_3
Product data sheet
Pin
1
2
3
4
mb
Type number
PSMN2R0-30YL
Symbol
V
V
V
I
I
P
T
T
Source-drain diode
I
I
Avalanche ruggedness
E
D
DM
S
SM
stg
j
DS
DGR
GS
tot
DS(AL)S
Continuous current is limited by package.
Symbol
S
S
S
G
D
Pinning information
Ordering information
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive
drain-source avalanche
energy
LFPAK
Package
Name
Description
source
source
source
gate
mounting base; connected to
drain
Description
plastic single-ended surface-mounted package (LFPAK); 4 leads
Conditions
T
T
V
V
t
T
T
t
V
R
p
p
j
j
mb
mb
GS
GS
GS
GS
≤ 10 µs; pulsed; T
≤ 10 µs; pulsed; T
≥ 25 °C; T
≥ 25 °C; T
All information provided in this document is subject to legal disclaimers.
= 25 °C; see
= 25 °C;
= 10 V; T
= 10 V; T
= 10 V; T
= 50 Ω; unclamped
Rev. 03 — 7 January 2010
j
j
≤ 175 °C
≤ 175 °C; R
mb
mb
j(init)
= 100 °C; see
= 25 °C; see
Figure 2
= 25 °C; I
mb
mb
= 25 °C; see
= 25 °C
Simplified outline
GS
D
= 20 kΩ
= 100 A; V
SOT669 (LFPAK)
Figure 1
Figure 1
1 2 3 4
Figure 3
mb
and
sup
N-channel TrenchMOS logic level FET
3
≤ 30 V;
PSMN2R0-30YL
[1]
[1]
[1]
Graphic symbol
Min
-
-
-20
-
-
-
-
-55
-55
-
-
-
G
mbb076
© NXP B.V. 2010. All rights reserved.
Max
30
30
20
100
100
667
97
175
175
100
667
151
SOT669
D
Version
S
Unit
V
V
V
A
A
A
W
°C
°C
A
A
mJ
2 of 14