DS1386 DALLAS [Dallas Semiconductor], DS1386 Datasheet - Page 16

• Manufacturer Part Number: DS1386
• Description: RAMified Watchdog Timekeeper
• Manufacturer: DALLAS [Dallas Semiconductor]

NOTES
1.
2.
3. t
4. t
5. t
6. If the
7. If the
8. If
9. Each DS1386 is marked with a four-digit date code AABB. AA designates the year of manufacture.
10. All voltages are referenced to ground.
11. Applies to both interrupt pins when the alarms are set to pulse.
12. Interrupt output occurs within 100 ns on the alarm condition existing.
13. Both
14. Real-Time Clock modules (DIP) can be successfully processed through conventional wave-soldering
In addition, for the PowerCap version:
a. Dallas Semiconductor recommends that PowerCap module bases experience one pass through solder
b. Hand soldering and touch-up: Do not touch or apply the soldering iron to leads for more than
state.
going low to the earlier of
-120 parts and t
1, the output buffers remain in a high impedance state during this period.
buffers remain in a high impedance state during this period.
the output buffers remain in a high impedance state during this period.
BB designates the week of manufacture. The expected t
the date of manufacture.
techniques as long as temperature exposure to the lithium energy source contained within does not
exceed +85°C. Post solder cleaning with water washing techniques is acceptable, provided that
ultrasonic vibration is not used.
reflow oriented with the label side up (“live-bug”).
3 (three) seconds. To solder, apply flux to the pad, heat the lead frame pad and apply solder. To
remove the part, apply flux, heat the lead frame pad until the solder reflows and use a solder wick to
remove solder.
OE
WE
WP
DS
DH
WE
or t
is measured from
is specified as the logical AND of the
= V
is high for a read cycle.
INTA
CE
DH
CE
is low or the
IH
are measured from the earlier of
low transition occurs simultaneously with or later than the
high transition occurs prior to or simultaneously with the
or V
and INTB (
DH
IL
. If
= 25 ns for -150 parts.
WE
WE
OE
INTB
low transition occurs prior to or simultaneously with the
going high. If
= V
CE
) are open drain outputs.
or
IH
during write cycle, the output buffers remain in a high impedance
WE
going high.
CE
CE
CE
16 of 20
is used to terminate the write cycle, then t
and
or
WE
WE
going high.
. t
DR
WP
is defined for DIP modules as starting at
is measured from the latter of
WE
WE
low transition in write cycle
high transition, the output
CE
low transition,
DH
= 20 ns for
CE
or
WE