ace93c46 ACE Technology Co., LTD., ace93c46 Datasheet
ace93c46
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ace93c46 Summary of contents
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... The ACE93C46 is available in space-saving 8-lead PDIP, 8-lead TSSOP and 8-lead JEDEC SOIC packages. The ACE93C46 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO ...
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... Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. Technology -0.3 to 6.5V GND -0.3 to Vcc 0.3V -40 to 85℃ -65 to 150℃ ACE93C46 Three-wire Serial EEPROM VER 1.2 2 ...
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... Ordering information Selection Guide ACE93C46 Pin Capacitance ...
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... Relative to SK 1.8V≦Vcc≦5.5V Relative to SK 1.8V≦Vcc≦5.5V Relative to SK ACE93C46 Three-wire Serial EEPROM Min Typ -0.3 Vcc+0.3 Vcc*0.7 Vcc+0.3 2.4 Vcc-0.2 = +1.8V to +5.5V, CL=1TTL Gate and 100pF CC Min Typ Max 0 ...
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... Note: 1. This parameter is characterized and is not 100% tested. Functional Description The ACE93C46 is accessed via a simple and versatile three-wire serial communication interface. Device operation is controlled by seven instructions issued by the host processor. A valid instruction starts with a rising edge of CS and consists of a start bit (logic“1”) followed by the appropriate op code and the desired memory address location. ...
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... The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction. The DO pin outputs the Ready/Busy status of the part brought high after being kept low for a minimum of 250ns (TCS). The WRAL instruction is valid only at VCC = 5.0V ± 10%. Technology 00XXXXX 00XXXX ACE93C46 Three-wire Serial EEPROM only at VCC=4.5V to 5.5V Disables all programming instructions VER 1 ...
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... To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations. The operation of the Read instruction is independent of both the EWEN and EWDS instructions and can be executed at any time. Timing Diagrams Note: This is the minimum SK period. Organization Key for Timing Diagrams ACE93C46 (1K) I/O * ...
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... Note: Valid only at VCC=4.5V to 5.5V Technology Figure 3: EWEN Timing Figure 4: EWDS Timing Figure 5: WRITE Timing Figure 6: WRAL Timing (1) ACE93C46 Three-wire Serial EEPROM VER 1.2 8 ...
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... Note: Valid only at VCC=4.5V to 5.5V Technology Figure 7: ERASE Timing Figure 8: ERAL Timing (1) ACE93C46 Three-wire Serial EEPROM VER 1.2 9 ...
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... Packaging information PDIP-8 Note: Dimensions in Millimeters. Technology ACE93C46 Three-wire Serial EEPROM VER 1.2 10 ...
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... SOP-8 Note: Dimensions in Millimeters. Technology ACE93C46 Three-wire Serial EEPROM VER 1.2 11 ...
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... TSSOP-8 Note: Dimensions in Millimeters. Technology ACE93C46 Three-wire Serial EEPROM VER 1.2 12 ...
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... A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its safety or effectiveness. Technology Notes ACE Technology Co., LTD. http://www.ace-ele.com/ ACE93C46 Three-wire Serial EEPROM VER 1.2 13 ...