cx82100 Conexant Systems, Inc., cx82100 Datasheet - Page 92
cx82100
Manufacturer Part Number
cx82100
Description
Home Network Processor Hnp
Manufacturer
Conexant Systems, Inc.
Datasheet
1.CX82100.pdf
(226 pages)
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Table 6-1. EMC SDRAM Interface Signal Descriptions
Table 6-2. PC100 Compliant Mode Register
6-2
MD[15:0]
MA[11:0]
MB[1:0]
MM[1:0]
MRAS#
MCAS#
MWE#
MCS#
MCKE
MCLK
Pin Name
Bit No.
11:7
6:4
2:0
3
LTMODE
WT
BL
I/O
I/O
O
O
O
O
O
O
O
O
O
Name
Conexant Proprietary and Confidential Information
Memory Data
Memory Address
Bank Address
Memory Mask
Row Address Strobe
Column Address
Strobe
Memory Write Enable
Memory Chip Select
Memory Clock Enable
Memory Clock
The SDRAM clock runs at 100 MHz, however, 125 MHz rated SDRAM is required in
order to guarantee setup time margin.
Signal Name
CX82100 Home Network Processor Data Sheet
Reserved.
CAS# Latency.
Wrap Type.
Burst Length.
0 = Linear.
1 = Interleave.
011 =
All Other =
011 =
All Other =
Bi-directional data access bus for DRAM.
Multiplexed row and column address for access of data up to 8 MB.
Selects active memory bank.
Input mask signal for write accesses.
Starts SDRAM access with strobe of row address.
Strobes column address and data bytes.
Indicates write access to SDRAM.
Enables the SDRAM command decoder.
Memory Clock activation.
All SDRAM signals sampled on positive edge.
3 cycles.
Reserved.
8 cycles.
Reserved.
Supported Function
Description
101306C
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