cxp85452 Sony Electronics, cxp85452 Datasheet - Page 17

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cxp85452

Manufacturer Part Number
cxp85452
Description
Cmos 8-bit Single Chip Microcomputer
Manufacturer
Sony Electronics
Datasheet

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(6) I
Fig. 9. I
Fig. 10. I
• A pull-up resistor (Rp) must be connected to SDA0 (or SDA1), and SCL0 (or SCL1).
• The SDA0 (or SDA1) and SCL0 (or SCL1) series resistance (Rs = 300Ω or less) can be used to reduce spike
1
SCL clock frequency
Bus-free time before starting transfer
Hold time for starting transfer
Clock low level width
Clock high level width
Set-up time for repeated transfers
Data hold time
Data set-up time
SDA, SCL rise time
SDA, SCL fall time
Set-up time for transfer completion
SDA
SCL
noise caused by CRT flashover.
For the data hold time, the SCL rise time (300ns Max.) is not considered so that 300ns should be exceeded.
2
C bus timing
2
C bus transfer data timing
2
C device recommended circuit
P
t
BUF
Item
S
t
HD; STA
t
t
LOW
R
SDA0
(or SDA1)
SCL0
(or SCL1)
R
S
t
device
HD; DAT
I
2
C
f
t
t
t
t
t
t
t
t
t
t
SLC
BUF
HD; STA
LOW
HIGH
SU; STA
HD; DAT
SU; DAT
R
F
SU; STO
Symbol
R
S
R
t
t
HIGH
F
S
(Ta = –20 to +75°C, V
– 17 –
device
I
2
C
SCL
SDA, SCL
SDA, SCL
SCL
SCL
SDA, SCL
SDA, SCL
SDA, SCL
SDA, SCL
SDA, SCL
SDA, SCL
t
SU; DAT
R
S
Pin
R
P
R
Condition
P
DD
St
= 4.5 to 5.5V, Vss = 0V reference)
t
SU; STA
t
HD; STA
Min.
250
4.7
4.0
4.7
4.0
4.7
0 ∗
4.7
0
1
t
SU; STO
CXP85452/85460
Max.
100
300
1
P
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs

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