x76f200 Intersil Corporation, x76f200 Datasheet - Page 2

• Manufacturer Part Number: x76f200
• Description: Secure Serialflash
• Manufacturer: Intersil Corporation

X76F200
PIN DESCRIPTIONS
Serial Clock (SCL)
The SCL input is used to clock all data into and out of the
device.
Serial Data (SDA)
SDA is an open drain serial data input/output pin. During
a read cycle, data is shifted out on this pin. During a write
cycle, data is shifted in on this pin. In all other cases, this
pin is in a high impedance state.
Reset (RST)
RST is a device reset pin. When RST is pulsed high the
X76F200 will output 32 bits of fixed data which conforms
to the standard for “synchronous response to reset”. The
part must not be in a write cycle for the response to reset
to occur. See Figure 7. If there is power interrupted
during the Response to Reset, the response to reset will
be aborted and the part will return to the standby state.
The response to reset is "mask programmable" only!
DEVICE OPERATION
The X76F200 memory array consists of thirty 8-byte
sectors. Read or write access to the array always begins
at the first address of the sector. Read operations then
can continue indefinitely. Write operations must total 8
bytes.
There are two primary modes of operation for the
X76F200; Protected READ and protected WRITE.
Protected operations must be performed with one of two
8-byte passwords.
The basic method of communication for the device is
generating a start condition, then transmitting a
command, followed by the correct password. All parts will
be shipped from the factory with all passwords equal to
‘0’. The user must perform ACK Polling to determine the
validity of the password, before starting a data transfer
(see Acknowledge Polling.) Only after the correct
password is accepted and a ACK polling has been
performed, can the data transfer occur.
To ensure the correct communication, RST must remain
LOW under all conditions except when running a
“Response to Reset sequence”.
Data is transferred in 8-bit segments, with each transfer
being followed by an ACK, generated by the receiving
device.
If the X76F200 is in a nonvolatile write cycle a “no ACK”
(SDA=High) response will be issued in response to
loading of the command byte. If a stop is issued prior to
2
the nonvolatile write cycle the write operation will be
terminated and the part will reset and enter into a
standby mode.
The basic sequence is illustrated in Figure 1.
PIN NAMES
PIN CONFIGURATION
After each transaction is completed, the X76F200 will
reset and enter into a standby mode. This will also be the
response if an unsuccessful attempt is made to access a
protected array.
SDA
SCL
RST
Vcc
Vss
NC
V
SDA
NC
V
V
Vss
NC
V
NC
NC
SS
CC
NC
CC
NC
Symbol
SS
1
2
1
2
3
4
3
4
1
2
3
4
TSSOP
PDIP
SOIC
Serial Data Input/Output
Serial Clock Input
Reset Input
Supply Voltage
Ground
No Connect
8
7
6
5
8
7
6
5
8
7
6
5
V
RST
SCL
NC
RST
SCL
SDA
NC
RST
SCL
SDA
NC
CC
Description
SCL
RST
Smart Card Module
V
NC
CC
GND
SDA
NC
NC