SL2150KG ZARLINK [Zarlink Semiconductor Inc], SL2150KG Datasheet - Page 3

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SL2150KG

Manufacturer Part Number
SL2150KG
Description
Cable Tuner Front End LNA with AGC
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
2.0
The SL2150D is a broadband wide dynamic range dual output tuner front end LNA with AGC. It also has application
is any system where a wide dynamic range broadband power splitter is required.
The pin assignment is contained in Figure 2 and the block diagram in Figure 1.The port internal peripheral circuits
are contained in Figure 14.
In normal application the RF input is interfaced to the device input. The input preamplifier is designed for low noise
figure, within the operating region of 50 to 860 MHz and for high intermodulation distortion intercept so offering
good signal to noise plus composite distortion spurious performance when loaded with a multi carrier system. The
preamplifier also provides an impedance match to a 75 Ω source; the typical impedance is shown in Figure 4.
The input NF is shown in Figure 6.
The output of the preamplifier is then power split to two independently controlled AGC stages. Each AGC stage
provides for a minimum of 30 dB of gain control across the input frequency range. The typical AGC characteristic
and NF versus gain setting are contained in Figure 5 and Figure 7 respectively.
Finally each of the AGC stages drive an output buffer of differential output impedance of 440 Ω, which provides a
nominal 11 dB of gain when terminated into a differential 75 Ω load, as in Figure 11. Each channel AGC and output
buffer can be independently powered down.
In application it is important to avoid saturation of the output stage, therefore it is recommended that the output
standing current be sunk to Vcc through an inductor. A resistive pull up can also be used as shown in Figure 13 -
"Example Application Driving 100 W Load with Resistive Pull Up", however the resistor values should not exceed
20 ohm single ended.
If an inductive current sink is used the maximum available gain from the device is circa 26 dB. This gain can be
reduced by application of an external load between the differential output ports. The gain can be approximately
calculated from the following formula:
For example when driving a 100 ohm load as in Figure 12, the gain equals
- GAIN = 20*log ((Parallel combination of 440 ohm and external load between ports)/22 ohm)+2 dB
- GAIN = 20 *log ((440 *100)/(440+100)/22)+2 dB =12 dB.
Functional Description
Zarlink Semiconductor Inc.
SL2150D
3
Data Sheet

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