cxd1179q Sony Electronics, cxd1179q Datasheet
cxd1179q
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cxd1179q Summary of contents
Page 1
... Video A/D Converter with Clamp Function Description The CXD1179Q is an 8-bit CMOS A/D converter for video with synchronizing clamp function. The adoption of 2 step-parallel method achieves ultra-low power consumption and a maximum conversion speed of 35MSPS. Features • Resolution: 8-bit ± 1/2LSB (DL) • ...
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... Reference supply Lower encoder Lower sampling (4 BIT) comparator (4 BIT) Lower sampling Lower encoder comparator (4 BIT) (4 BIT) Upper sampling Upper encoder comparator (4 BIT) (4 BIT CCP VREF CLE —2— CXD1179Q VRBS 25 VRB 24 AVss 23 22 AVss VRT 18 VRTS ...
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... TEST Equivalent circuit D0 (LSB (MSB) output Leave open during normal usage Digital + Clock input Fix Pin —3— CXD1179Q Description , Pins 13 and during normal usage. SS ...
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... Clamps the signal voltage during Low interval Analog + Generates about +2.6 V when shorted with VRT Reference voltage (top Reference voltage (bottom Analog input AV SS Analog ground AV SS Generates about +0.6 V when shorted with VRB. 25 —4— CXD1179Q Description ...
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... A/D converter when CLE = High. The clamp pulse can be measured by connecting CLE to DV CLAMP DV SS several hundred PULSE DV DD Data is output when OE = Low. Pins are at high impedance 30 when OE = High pin —5— CXD1179Q Description voltage is IN through a DD resistor. ...
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... V 255 – – 13ns Timing Chart 4.5ns 90% 10% t PZL 1.3V 10% t PZH 90% 1.3V Timing Chart II. —6— CXD1179Q LSB : : Analog signal sampling point ...
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... NTSC 40 IRE mod ramp Fc = 14.3MSPS V = 0.5 V REF V = DC, IN PWS = 3 µ 2.5 V REF and a point of position where the voltage RB and a potential of point where the voltage rises equivalent to RT —7— CXD1179Q = 2 °C) RT Min. Typ. Max. Unit MSPS 0.5 35 MHz 25 –60 –40 –20 mV +55 ...
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... 4. –40 to +85 ° 4. –40 to +85 ° 14MSPS µF IN for NTSC wave —8— CXD1179Q = 0 2 ° Min. Typ. Max. Unit 4.5 6.1 8 230 330 440 0.52 ...
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... CX20202A-1 TTL CXD 1179Q ECL 620 –5.2V CLK 0.5V TTL ECL 2. 0. – —9— CXD1179Q Measurement DV DD point To output pin C L includes capacitance of the probe and others. L ERROR RATE H.P.F COUNTER 1 10bit D/A 2 VECTOR SCOPE D.G 620 D.P. –5. ...
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... Digital output Operation (See Block Diagram and Timing Chart 3) 1. The CXD1179Q is a 2-step parallel system A/D converter featuring a 4-bit upper comparators group and 2 lower comparators groups of 4-bit each. The reference voltage that is equal to the voltage between VRT – VRB/16 is constantly applied to the upper 4-bit comparator block. Voltage that corresponded to the upper data is fed through the reference supply to the lower data ...
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... The delay from the clock rising edge to the data output is about 13ns pin By connecting output mode is obtained. By connecting obtained. in series between the amplifier output and A/D input. = about 0 activated. RB —11— CXD1179Q high impedance is DD ...
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... At such time, the latch circuit is effective in this case 0.01µ 0.1µ 22 10P 23 0.01µ 24 +5V (Analog VREF 0.01µ 20k GND (Analog) —12— CXD1179Q +5V (Digital) 0.1µ OPEN GND (Digital) ...
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... GND (Digital) GND (Analog 0.01µ 0.1µ 0.01µ +5V (Digital) GND (Analog) —13— CXD1179Q +5V (Digital) 0.1µ OPEN Clamp Level 6 setting data Latch, Subtracter, 5 Comparator, etc DAC, PWM, etc. +5V (Digital) 0.1µ ...
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... SONY CODE EIAJ CODE JEDEC CODE 32PIN QFP (PLASTIC 0.15 0.3 – 0.1 0.24 M PACKAGE MATERIAL LEAD TREATMENT QFP-32P-L01 QFP032-P-0707 LEAD MATERIAL PACKAGE MASS —14— CXD1179Q 0.1 + 0.35 1.5 – 0.15 + 0.2 0.1 – 0.1 + 0.1 0.127 – 0.05 0° to 10° EPOXY RESIN SOLDER PLATING 42 ALLOY 0.2g ...