lc74792 Sanyo Semiconductor Corporation, lc74792 Datasheet
lc74792
Related parts for lc74792
lc74792 Summary of contents
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... Ordering number : EN*5965 Preliminary Overview The LC74792/ CMOS IC that provides PDC, VPS, and UDT data acquisition functions. The LC74792/JM supports microprocessor control of its operating modes and microprocessor read out of data acquired in any of its operating modes. Features • VPS data acquisition ( bytes) VPS: Video Program System • ...
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... Pin Assignment LC74792, 74792JM No. 5965-2/25 ...
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... V 1 Power supply (+ LC74792, 74792JM Description Digital system ground Connections for the crystal element and capacitors that form the crystal oscillator. Also used for external clock input (fsc, 2fsc, or 4fsc). Switches between external clock input mode and crystal oscillator mode. Set this pin low for crystal oscillator, and high for external clock input ...
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... Input voltage OSC Oscillator frequency F 2 OSC F 3 OSC Note that adequate measure must be taken to prevent noise from entering the Xtal LC74792, 74792JM Symbol Conditions V max V 1 and All input pins IN V SIO, SYNCJDG, SEPOUT, DAV, HOUT, and VOUT ...
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... Minimum input pulse width t CKL t CKH Data setup time t ICK Output delay time t CKO Note: In case of CMOS output type, depends on OSD timing. LC74792, 74792JM unless otherwise specified. DD Applicable pins Conditions DAV and SIO SEPOUT, CPOUT, SYNCJDG 4 HOUT, and VOUT I = – ...
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... LC74792, 74792JM Figure 1 Serial Data Input Timing Figure 2 Serial Data Input Timing (in case of N-ch open-drain type) (Test load) No. 5965-6/25 ...
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... LC74792, 74792JM No. 5965-7/25 ...
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... Once written, the first byte command identification code is retained until the next first byte is written. Data is written in second byte only continuous mode. (Automatic increment) If COMMAND00 read mode is written, the read mode becomes fixed. The read mode is cancelled with CS "H". LC74792, 74792JM First byte Data ...
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... FS2 FS3 1 3 — Normal operating mode 2 TSTMOD 1 Test mode 1 — SYSRST 1 All registers are reset LC74792, 74792JM Contents Function Contents Function Contents Function Contents Function FS FS2 FS3 Setting 2FSC 4FSC (CDLR can be deleted FSC ...
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... CPA1 CPA0 VPM3 VPM2 VPM1 VPM0 1 Note: All registers are cleared to 0 when the IC is reset by the RST pin. LC74792, 74792JM Contents Function Contents Function CPA2 CPA1 CPA0 Clock ...
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... VPS: bytes 3, 4, and 6 to 10, PDC: bytes Header 1: bytes 21. Status 1 (3): bytes 7 to 25, status 2 (4) bytes 7 to 35. Note: All registers are cleared to 0 when the IC is reset by the RST pin. LC74792, 74792JM Contents Function Contents Function ...
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... RN0 SN3 SN2 SN1 SN0 1 Note: All registers are cleared to 0 when the IC is reset by the RST pin. LC74792, 74792JM Contents Function Contents Function RN2 RN1 RN0 Number of HSYNC detections (128 ...
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... SJNS3 SJNS2 SJNS1 SJCS1 SJCS0 1 Note: All registers are cleared to 0 when the IC is reset by the RST pin. LC74792, 74792JM Contents Function Contents Function preset: Normal values preset: Values in parentheses SJNS3 SJNS2 SJNS1 Count ...
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... Vertical signal falling edge detection 1 VNPSEL 1 Vertical signal rising edge detection 0 VSEP: About 8.9 µs (NTSC) 0 VSPSEL 1 VSEP: About 17.8 µs (NTSC) Note: All registers are cleared to 0 when the IC is reset by the RST pin. LC74792, 74792JM Contents Function Contents Function SPO2 SPO1 SPO0 SEPout pin ...
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... Negative polarity 1 VOTKST 1 Positive polarity 0 Negative polarity 0 HOTKST 1 Positive polarity Note: All registers are cleared to 0 when the IC is reset by the RST pin. LC74792, 74792JM Contents Function Contents Function (Lo) (Hi) (Lo) (Hi) Notes Notes Number of scan lines VOUT mode setting HOUT mode setting VOUT polarity selection ...
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... Byte 5 biphase error check: on (data retained) 0 ECV5 1 Byte 5 biphase error check: off (data written) Note: All registers are cleared to 0 when the IC is reset by the RST pin. LC74792, 74792JM Contents Function Contents Function Notes Notes VPS data specification when BMS is 0. ...
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... ECP13 Byte 13 Hamming error check off (Data written) 1 {Bytes 38, 22, 30, 14, Note: All registers are cleared to 0 when the IC is reset by the RST pin. LC74792, 74792JM Contents Function Contents Function 32, 42, 32, 42} 32, 42, 32, 42} 31, 41, 31, 41} 31, 41, 31, 41} ...
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... ECP20 Byte 20 Hamming error check off (Data written) 1 {Bytes 45, 29, 37, 21, Note: All registers are cleared to 0 when the IC is reset by the RST pin. LC74792, 74792JM Contents Function Contents Function 35, 45, 35, 45} 35, 45, 35, 45} 34, 44, 34, 44} 34, 44, 34, 44} ...
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... Forcibly set to high or low only during the CSYNC period 0 2 SLH3 SLH2 SLH1 1 Note: All registers are cleared to 0 when the IC is reset by the RST pin. LC74792, 74792JM Contents Function Contents Function MODE S321 Clock discrimination ...
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... Byte4 Bit7 byte18 Byte5 Bit7 byte19 Byte6 Bit7 byte20 LC74792, 74792JM VPS mode Format2 bit0 byte16 bit0 byte11 byte17 bit0 bit0 byte18 bit0 byte12 ...
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... Bit7 byte24 Byte13 Bit7 byte25 Note: Data with the value 1 is output for sections for which there is no output data setting. LC74792, 74792JM VPS mode Format2 bit0 byte13 bit0 ...
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... Byte6 Bit7 byte31 6 (31 Note: Data with the value 1 is output for sections for which there is no output data setting. LC74792, 74792JM PAL Puls bit0 byte36 bit0 1 (36 ...
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... Byte13 Bit7 Note: Data with the value 1 is output for sections for which there is no output data setting. LC74792, 74792JM PAL Puls bit0 byte42 bit0 1 (42 bit0 ...
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... Sample Application Circuit • Using an external system clock Microcontroller LC74792, 74792JM No. 5965-24/25 ...
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... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of April, 1999. Specifications and information herein are subject to change without notice. LC74792, 74792JM PS No. 5965-25/25 ...