MP1T MITEL [Mitel Networks Corporation], MP1T Datasheet - Page 12

• Manufacturer Part Number: MP1T
• Description: Quadrature Downconverter
• Manufacturer: MITEL [Mitel Networks Corporation]

SL1711
I & Q baseband outputs
the SL1710 and as such is much less sensitive to the load
conditions.
presented to the SL1711 to ensure no differential gain or
phase degradation is introduced by the load circuits, which will
also include effects due to track striplines etc.
connection via co-axial cables to standard test equipment,
where such equipment is normally 50
therefore buffered through emitter followers which are
optimised to drive 50
in the SL1711 performance. These buffer stages are
selectable so enabling the outputs to be loaded directly for
interfacing direct with an ADC via a low capacitive link.
direct into the ADC converter such as the VP216, which will
present a >1 k low capacitive load, though it can interface
with lower impedances if desired.
I and Q baseband output signals never exceed 1.2V pk-pk.
Any gross distortion in the output waveform caused by
overdriving the output stages will compromise the system
performance.
guaranteed if the device is operated below the onset of
clipping.
12
SL1711 Evaluation Board
SL1711 I/Q downconverter.
practice the 479.5MHz IF oscillator on the SL1711and the
60MHz clock on the subsequent ADC would be controlled via
the baseband IQ demodulator chip such as the VP305 which
follows the dual channel ADC. For simplicity, the VCO is
locked using Mitel Semiconductor SP5611 synthesiser, con-
trolled via an I2C bus.
Supplies
varactor line.
centre pin of the connector is GND.
decline. AGC loops should be designed to take account of this.
mVp-p and the onset of clipping is typically > 1.5V.
The SL1711 offers a greatly improved drive capability over
It is still important however to carefully balance the loads
For demonstration purposes the output is unsuitable for
To overcome this problem the outputs of the SL1711 are
In most applications the SL1711 will normally interface
The output is optimised for typical drive levels of 760
Care must be taken with system design to ensure that the
Device performance characteristics can only be
This board has been created to show the operation of the
It does not attempt to simulate a real system, since in
For full evaluation, 30V and 5V supplies are necessary.
The board must be provided with the following supplies:
A) 5V for the SL1711 and SP5611 and 30V for the
The supply connector is a 3 pin 0.1" pitch pin header. The
Outputs driven into hard clipping can exhibit amplitude
loads without appreciable degradation
or highly capacitive.
I
which feeds directly to the SP5611 synthesiser.
is supplied with the I
Input and Output connections
Links and Switches
The board is provided with the following:
VCO DISABLE switch
This disables the VCO of the SL1711. It does NOT power
down the chip.
AGC ADJUST potentiometer
SL1711 which controls the gain of the chip. TP1 is provided as
a means of monitoring the AGC voltage.
LK1 and LK2
horizontally to connect the outputs of the SL1711 either
directly or via buffers to the SMA output connectors of the
board.
connected directly.
connected via buffers.
2
C Bus connections
The board is provided with an RJ11 I
This connects to a standard 6-way connector cable which
The board is provided with the following connectors:
A) IF I/P SMA connector SK1 which is AC coupled to the
B) I CH OUT SK2 and Q CH OUT (SK3) which provide
These are links which may be placed either vertically or
If the links are placed vertically 1-2 and 3- the outputs are
If the links are placed horizontally 1-3 and 2- the ouputs are
RF input of the SL1711.
either a buffered or direct baseband output signal from
the SL1711 (depending on which way the links LK1
and LK2 are set). The output buffers should be used
when driving 50 test equipment or co-axial lines.
The potentiometer sets the AGC input voltage of the
2
C/3-wire bus interface box.
2
C bus connector