SD6830P AUK [AUK corp], SD6830P Datasheet
SD6830P
Available stocks
Related parts for SD6830P
SD6830P Summary of contents
Page 1
... Descriptions of this spec sheet assume that the SD6830 include driver for infrared LED. 3. Ordering Information Type NO. SD6830P-option SD6830-option SD6830P-option SD6830-option Marking SD6830P-option SD6830-option SD6830P-option SD6830-option KSI-W002-000 SD6830 4BIT MICROCONTROLLER 1.8V ~ 3.6V Less than 3uW 20/24 DIP, 20/24 SOP Package Code DIP20 SOP20 DIP24 SOP24 1 ...
Page 2
Block Diagram 1 VSS 2 OSCIN OSC 3 OSCOUT Reset Control Port Port Port Watchdog Timer ...
Page 3
PIN Assignment and Description 5.1 PIN Assignment for 24PINS( DIP24, SOP24) VSS OSCIN OSCOUT 5.2 PIN Description for 24 PINS Symbol Pin No. VDD 24 VSS 1 TEST 22 INPUT ...
Page 4
PIN Assignment for 20PINS( DIP20, SOP20) VSS OSCIN OSCOUT 5.4 PIN Description for 20 PINS Symbol Pin No. VDD 20 VSS 1 TEST 18 INPUT OSCin 2 INPUT OSCout 3 OUTPUT C/REM ...
Page 5
I/O CIRCUIT SCHEMATICS VDD PIN VSS DATA STOP Note : If STOP mode is specified, the TYPE C output becomes “L” state and the TYPE B output becomes floating ...
Page 6
Basic Function Block 6.1 Program Counter (PC) Program counter is used to indicate the address of the next instruction to be executed. The 10-bit program counter consists of two registers, PC This is a polynomial counter. 6.2 Program Memory ...
Page 7
Data Memory (RAM) Data memory is used to store various type of processing data. This consists of a 32-nibble, which is organized into two files of 16 nibbles each. RAM addressing is indirectly implemented by a two registers; H, ...
Page 8
Arithmetic and Logic Unit (ALU) This unit is used to perform arithmetic and logical operations such as addition, comparison, and bit manipulation. 6.6 Carry Flag (CY) The carry flag contains the carry generated by the arithmetic and logical unit ...
Page 9
Registers Register A Register A, called the accumulator, plays a central role, is used to store an input or an output operand (result) in the execution of most instructions. It consists of 4-bit. Register B Register B is used ...
Page 10
I /O Ports Port C/REM Port C/REM is a 1-bit output port, which is related with the bit 3 of accumulator, with CMOS N-channel open drain, which have large current sink capability, for I.R.LED drive. This output can be ...
Page 11
Carrier frequency generator One of seven carrier frequencies can be selected and transmitted through the C/REM pin by programming the register Z and port C. Fosc/8 (1/2 duty ) Fosc/8 (1/4 duty ) Fosc/11 (4/11 duty ) Vdd ( ...
Page 12
Watchdog timer (WDT) The watchdog timer provides the means to return to a reset condition when a system malfunction occurs and the program enters an infinite loop caused by noise or any abnormal state. Also this timer have a ...
Page 13
Power-on reset The SD6830 incorporates an on-chip power-on reset circuitry which provides internal chip reset for most power-up situations. The power-on reset circuit and the watchdog timer are closely related. On power-up the power-on reset circuit is active and ...
Page 14
VDD 4 PORT D 4 PORT E STOP instruction internal /POR WDT overflow Figure 6-6. Rest structure and Release Timing for STOP Mode to Normal Mode 6.14 OSC Divide Option The OSC divide option provides a maximum 1MHz system clock ...
Page 15
Recommended operating conditions Symbols Parameters V Supply Voltage DD "H" input Voltage, all input pins V IH1 except OSCIN V "H" input Voltage, OSCIN IH2 "L" input Voltage, all input pins V IL1 except OSCIN V "L" input Voltage, ...
Page 16
Packing Outlines and Dimensions ...
Page 17
...
Page 18
Instructions 9.1 Symbol Description SYMBOL Bit Register H 1-Bit Register Z 3-Bit Register PCH The Higher 4-Bit of the Program Counter PCL The Lower 6-Bit of the Program Counter PC 10-Bit Program Counter ...
Page 19
Opcode Map MSB 0000b 0001b 0010b LSB 0h ADDC 0000b 0h NOP @HL LDA 0001b 1h STOP LDA 0010b 2h STA 0011b 3h RRC H LDA 0100b 4h LDA 0101b 5h IF0 @HL.b LDA 0110b 6h 0111b 7h NOT ...
Page 20
Instruction Descriptions ADD n Binary code : 0110xxxx Syntax : [<label>] ADD n Operation : (A) ← ( n=0~ must be decimal number ) Flags : CY: Unaffected. SF: Set to one if carry occurs, ...
Page 21
CALL addr Binary code : 010100xx Syntax : [<label>] CALL addr Operation : (SK1) ← (SK0), (SK0) ← (PC (PC) ← addr, addr = 000 ~ 3FF Flags : CY: Unaffected SF: Unaffected Words/Cycles : 2/2 Description : ...
Page 22
CLRB F Binary code : 00001010 Syntax : [<label>] CLRB F Operation : F.(L) ← 0 Flags : CY: Unaffected 1/1 Words/Cycles : Description : Clears the specified bit of port F addressed by the lower 3-bit of register L ...
Page 23
CLRB K Binary code : 00101110 Syntax : [<label>] CLRB K Operation : (K) ← 0 Flags : CY: Unaffected SF: Unaffected 1/1 Words/Cycles : Description : Clears the port K to zero. Example : CLRB K IF0 @HL.b Binary ...
Page 24
IFEQU @HL Binary code : 00001111 Syntax : [<label>] IFEQU @HL Operation : (A) = M[(HL)] Flags : CY : Unaffected SF : Set to one if equal, cleared otherwise 1/1 Words/Cycles : Description : Compares the contents of accumulator ...
Page 25
JMP addr Binary code : 10xxxxxx Syntax : [<label>] JMP addr Operation : (PCL) ← addr, addr = addr must be hexadecimal number ) Flags : CY : Unaffected SF : Unaffected Words/Cycles : 1/1 Description ...
Page 26
LDA n Binary code : 0111xxxx Syntax : [<label>] LDA n Operation : (A) ← n, n=0~ must be decimal number. ) Flags : CY : Unaffected SF : Unaffected Words/Cycles 1/1 : Description : Loads an immediate ...
Page 27
LDA E Binary code : 00010010 Syntax : [<label>] LDA E Operation : (A) ← (E) Flags : CY : Unaffected SF : Unaffected Words/Cycles 1/1. : Description : Loads the contents of port E into the accumulator Example : ...
Page 28
LDL n Binary code : 0100xxxx Syntax : [<label>] LDL n Operation : (A) ← must be decimal number ) Flags : CY : Unaffected SF : Unaffected Words/Cycles 1/1 : Description ...
Page 29
NOT Binary code : 00010111 Syntax : [<label>] NOT Operation : (A) ← /(A) Flags : CY : Unaffected SF : Unaffected Words/Cycles 1/1 : Description : The contents of accumulator are 1 Example : LDA 7 NOT RET Binary ...
Page 30
SETB @HL.b Binary code : 010111xx Syntax : [<label>] SETB @HL.b Operation : M[(HL)].b ← 1 Flags : CY : Unaffected SF : Unaffected Words/Cycles 1/1 : Description : Sets the specified bit of memory addressed by registers H and ...
Page 31
SETB G Binary code : 00101101 Syntax : [<label>] SETB G Operation : (G) ← 1 Flags : CY : Unaffected SF : Unaffected Words/Cycles 1/1 : Description : Sets the port G to one. Example : SETB G SETB ...
Page 32
STA @HL Binary code : 00101001 Syntax : [<label>] STA @HL Operation : M[(HL)] ← (A) Flags : CY : Unaffected SF : Unaffected Words/Cycles 1/1 : Description : Stores the contents of accumulator in memory addressed by registers H ...
Page 33
STA C Binary code : 00001100 Syntax : [<label>] STA C Operation : (C) ← (A) Flags : CY : Unaffected SF : Unaffected Words/Cycles 1/1 : Description : Stores the bit 3 of accumulator in the port C. Example ...
Page 34
STOP Binary code : 00000001 Syntax : [<label>] STOP Operation : Stop the oscillation of the oscillator, and reset PORT F to zero Flags : CY : Unaffected Words/Cycles 1/1 : Description : Stops the oscillation of the oscillator. Example ...