lc8904q Sanyo Semiconductor Corporation, lc8904q Datasheet - Page 10

• Manufacturer Part Number: lc8904q
• Description: Digital Audio Interface Receiver
• Manufacturer: Sanyo Semiconductor Corporation

The LC8904Q subcode interface uses the user bit subcode sync word and start bit for system timing extraction.
Therefore, since SBSY and SFSY will change with that timing, user bit transmission must follow the table shown below
when using the values of t
Note: 1. The subcode sync word is defined as the block sync section (block start) when 0-valued data has been received consecutively for at least 22 bits.
2. The period of the frame sync signal S0 is 90.7 µs. The S1 period also has a minimum length of 90.7 µs (when 0-valued data is received
3. The SBCK signal input delay (t
consecutively for 22 bits), depending on the subcode sync word period. Not that the shortest word is 10 bits.
shortest user data word length is used.
BW
, t
F
HD
, t
) and pulse widths (t
CHW
, t
CLW
, and t
CHW
CD
and t
with the specifications listed in the preceding tables.
LC8904Q
CLW
) must be set to values less than or equal to the typical values when the
No. 5014-10/20