lc8902q Sanyo Semiconductor Corporation, lc8902q Datasheet
lc8902q
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lc8902q Summary of contents
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... Ordering number : EN4333A Overview The LC8902 and LC8902Q are receiver LSIs for applications in which data is transmitted between digital audio equipment in the EIAJ format. These LSIs synchronize with the input signal and demodulate that signal to a regular format signal. Features • Built-in PLL circuit synchronizes with the input EIAJ format signal. • ...
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Application Usage Overview Diagram When both digital source mode and analog source mode are used Digital source mode: EIAJ CP-1201 format data reception mode Analog source mode: Analog data is received and converted to digital for signal processing. This figure ...
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Allowable Operating Ranges Parameter Symbol Supply voltage V DD Operating temperature Topg DC Characteristics –30 to +75°C, V Parameter Symbol Input high level voltage Input low level voltage Input high level ...
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Microcomputer Interface Block AC Characteristics –30 to +75°C, V Parameter Symbol CL low level pulse width TWL CL high level pulse width TWH Data setup time TDS Data hold time TDH CL rise time Tr CL fall ...
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The LC8902/Q uses the subcode synchronization word and the start bit in the user bits for subcode interface system timing extraction. Therefore, SBSY and SFSY change depending on that timing. Keep the following notes on user bit transfer in mind ...
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Pin Functions Pin No. Symbol I/O QIP DIP 1 6 DIN5 I Data input. There is no built-in amplifier on this pin DOUT1 O Data outputs 3 8 DOUT2 O RC oscillator input 4 9 RC1 I This ...
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Block Diagram Clock Modes The LC8902/Q CLKOUT1 and CLKOUT2 output clock modes are selected by the CLK and CLKMD pins according to the table. CLK CLK OUT1 L 384 fs clock output H 512 fs clock output CLK MD CLK ...
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Microcomputer Interface The microcomputer interface is used for specifying the data input pin, for setting the output data format, and for specifying subcode output, system stop, and analog source mode. The figure shows the interface I/O formats. Microcomputer Interface Formats ...
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Data demodulation input DIN1 DIN2 I10 L DOUT1 DIN1 DIN2 I11 L I12 L I13 L DOUT2 DIN1 DIN2 Note: Setting the data demodulation input code to one of the ...
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FS Output Code The SUB1 and SUB2 pins indicate the input data sampling frequency. Sampling frequency 32 kHz 44.1 kHz SUB1 H SUB2 H Note: The “#1” values indicates PLL lock error or analog source mode. When SUB1 and SUB2 ...
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Errors 1. ERROR pin: This pin goes high when there are errors in the input data or when the PLL circuit is unlocked. When data demodulation returns to normal, the high level is held for about 200 to 300 ms ...
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XMODE The XMODE pin resets the LC8902/Q system. The LC8902/Q will start to function normally if a high level is applied to this pin after the power supply voltage rises above a value of at least 4 Once ...
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Sample Application Circuit Circuit Constants Item Symbol Value 5.6 k Resistors R5 5 120 to 150 R7 200 R8 200 k LC8902, 8902Q Item Symbol Value C1 1000 ...
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Input Pin Application Circuits Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of ...