adc-318 C&D Technologies., adc-318 Datasheet - Page 3

• Manufacturer Part Number: adc-318
• Description: 8-bit, 120mhz And 140mhz Full-flash A/d Converter
• Manufacturer: C&D Technologies.

Footnotes:
TECHNICAL NOTES
1. The ADC-318 and ADC-318A are ultra high speed full flash
PARAMETERS
POWER REQUIREMENTS (cont.)
Power Dissipation
ADC-318
ADC-318A
Operating Temp. Range, Case
Thermal Impedance
Storage Temperature Range
Package Type
Weight
ANALOG IN
+2V to +4V
VIN = +3V +0.07Vrms
VIH = DGND3–0.8V
VIL = DGND3–1.6V
VIH = 3.5V
VIL = 0.2V
TTL, 0.8 to 2.0V, CL = 5pF
DMUX Mode, CL = 5pF; FC = Clock
frequency
A/D converters that have 120MHz and 140MHz sampling
rates respectively. The ADC-318 and ADC-318A are fully
interchangeable products with the exception of their
sampling rates. Their inputs are TTL, ECL and PECL
compatible and their outputs are TTL compatible. Obtaining
fully specified performance from the ADC-318 and ADC-
®
ADC-318, 318A
ja
VRT
+4V
A/D CLOCK
Figure 2-1: One Power Supply Operation (TTL, PECL)
V
+2V
1 2
TTL
PECL
RB
10µF
10µF
10µF
+
+
5V(A)
15
13
14
48
47
46
2
11
4
6
7
9
+
3 10
5
®
8
10µH
ADC-318A
ADC-318
–20
–65
—
11
12
680
570
12
1
Straight Mode, CL = 5pF
CL = 5pF
VIN = FS, DMUX mode
VIN = FS, DMUX mode, Error >16LSB
VIN = FS, Straight mode, Error >16LSB
"Times Per Sample"
Mounted on 50x50mm, 1.6mm thick
glass fiber base epoxy board
19 30 31 42
20 29
0.25 ounces (0.7 grams)
5V(D)
62.5
48-pin, plastic QFP
—
—
32 41
780
790
Note: All capacitors not otherwise designated are 0.1µF
+
43
44
45
10µF
+150
28 B BIT 1
27 B BIT 2
26 B BIT 3
25 B BIT 4
24 B BIT 5
23 B BIT 6
22 B BIT 7
21 B BIT 8
LSB
TTL
CLOCK OUT
MSB
40 A BIT 1
39 A BIT 2
38 A BIT 3
37 A BIT 4
36 A BIT 5
35 A BIT 6
34 A BIT 7
33 A BIT 8
LSB
MSB
+75
980
960
—
°C/Watt
mW
mW
°C
°C
5V(D)
5V(D)
3
2. Power supply lines and grounding may effect the perfor-
3. The analog input terminal (pin 6) has 21pF of input capaci-
4. The use of a buffer amplifier and bypass capacitors is also
ANALOG IN
318A requires that the characteristic impedance of all input/
output logic and analog input lines be properly matched.
mance of the ADC-318 and ADC-318A. Separate and
substantial AGND and DGND ground planes are required.
These grounds have to be connected to one earth point
underneath the device. There are three digital grounds,
DGND1 (pin 29), DGND2 (pins 20, 32, 41) and DGND3 (pin
12). These DGND 's are separated internally. DGND1 and
DGND2 are always connected externally but DGND3 shall
be connected differently depending on whether the single or
dual power supply mode is used, as explained later.
The ADC-318 and ADC-318A have separate +AVs and
+DVs pins. It is recommended that both +AVs and +DVs be
powered from a single source. Other external digital circuits
must be powered with a separate +DVs. Layouts of +AVs
and +DVs lines must be separated like the GND lines to
avoid mutual interference and are connected to a point
through an LC filter. There are two digital supplies +DVs1
(pin 30) and +DVs2 (pins 19, 31, 42). These are also
separated internally. These must be tied together outside
while in use. Bypassing all power lines with a 0.1uF ceramic
chip capacitor and the use of multilayered PC boards is
recommended.
tance. The input signal has to be given via a buffer amplifier
which has enough driving power. Make lead wires as short
as possible and use chip resistors and capacitors to avoid
parasitic capacitance and inductance.
recommended on the reference input terminals VRT (pin 11)
and VRB (pin 2). The analog input range is determined by
+2V to +4V
ECL
VRT
+4V
V
+2V
A/D CLOCK
A/D CLOCK
RB
Figure 2-2: Two Power Supply Operation (ECL)
10µF
10µF
10µF
+
+
5V(A)
15
13
14
48
47
46
2
11
4
6
7
9
ADC-318, ADC-318A
+
3 10
5
5V(D)
8
10µH
ADC-318A
ADC-318
1
+
12 20 29
19 30 31 42
10µF
5V(D)
32 41
+
43
44
45
10µF
28 B BIT 1
27 B BIT 2
26 B BIT 3
25 B BIT 4
24 B BIT 5
23 B BIT 6
22 B BIT 7
21 B BIT 8
LSB
TTL
CLOCK OUT
MSB
40 A BIT 1
39 A BIT 2
38 A BIT 3
37 A BIT 4
36 A BIT 5
35 A BIT 6
34 A BIT 7
33 A BIT 8
LSB
MSB
5V(D)
5V(D)