w49v002fa Winbond Electronics Corp America, w49v002fa Datasheet - Page 7

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w49v002fa

Manufacturer Part Number
w49v002fa
Description
256k X 8 Cmos Flash Memory With Fwh Interface
Manufacturer
Winbond Electronics Corp America
Datasheet

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FWH CYCLE DEFINITION
START
IDSEL
MSIZE
TAR
ADDR
SYNC
DATA
FIELD
CLOCKS
NO. OF
N
1
1
1
2
7
2
"1101b" indicates FWH Memory Read cycle; while "1110b" indicates FWH
Memory Write cycle.
This one clock field indicates which FWH component is being selected.
Memory Size. There is always show “0000b” for single byte access.
Turned Around Time
Address Phase for Memory Cycle. FWH supports the 28 bits address
protocol. The addresses transfer most significant nibble first and least
significant nibble last. (i.e. Address[27:24] on FWH[3:0] first , and
Address[3:0] on FWH[3:0] last.)
Synchronous to add wait state. "0000b" means Ready, "0101b" means
Short Wait, "0110b" means Long Wait, "1001b" for DMA only, "1010b"
means error, and other values are reserved.
Data Phase for Memory Cycle. The data transfer least significant nibble first
and most significant nibble last. (i.e. DQ[3:0] on FWH[3:0] first , then
DQ[7:4] on FWH[3:0] last.)
- 7 -
DESCRIPTION
Publication Release Date: February 19, 2002
W49V002FA
Revision A2

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