k6r1008v1b-c Samsung Semiconductor, Inc., k6r1008v1b-c Datasheet

Page 1

... K6R1008V1B-C/B-L, K6R1008V1B-I/B-P Document Title 128Kx8 Bit High Speed Static RAM(3.3V Operating), Revolutionary Pin out. Operated at Commercial and Industrial Temperature Ranges. Revision History Rev No. History Rev. 0.0 Initial release with Design Target. Rev.1.0 Release to Preliminary Data Sheet. 1.1. Replace Design Target to Preliminary. Rev.2.0 Release to Final Data Sheet. ...

Page 2

... K6R1008V1B-C/B-L, K6R1008V1B-I/B-P 128K x 8 Bit High-Speed CMOS Static RAM(3.3V Operating) FEATURES • Fast Access Time 8,10,12ns(Max.) • Low Power Dissipation Standby (TTL) : 50mA(Max.) (CMOS) : 5mA(Max.) 0.7mA(Max.) - L-Ver. only Operating K6R1008V1B-8 : 160mA(Max.) K6R1008V1B-10 : 155mA(Max.) K6R1008V1B-12 : 150mA(Max.) • Single 3.3 0.3V Power Supply • TTL Compatible Inputs and Outputs • ...

Page 3

... K6R1008V1B-C/B-L, K6R1008V1B-I/B-P ABSOLUTE MAXIMUM RATINGS* Parameter Voltage on Any Pin Relative Voltage on V Supply Relative Power Dissipation Storage Temperature Operating Temperature Commercial Industrial * Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied ...

Page 4

... K6R1008V1B-C/B-L, K6R1008V1B-I/B-P AC CHARACTERISTICS ( TEST CONDITIONS* Parameter Input Pulse Levels Input Rise and Fall Times Input and Output timing Reference Levels Output Loads * The above test conditions are also applied at industrial temperature range. Output Loads( OUT ...

Page 5

... K6R1008V1B-C/B-L, K6R1008V1B-I/B-P WRITE CYCLE* Parameter Symbol Write Cycle Time t WC Chip Select to End of Write t CW Address Set-up Time t AS Address Valid to End of Write t AW Write Pulse Width(OE High Write Pulse Width(OE Low) t WP1 Write Recovery Time t WR Write to Output High-Z ...

Page 6

... K6R1008V1B-C/B-L, K6R1008V1B-I/B-P TIMING WAVEFORM OF READ CYCLE(2) Address CS OE Data out Current SB NOTES(READ CYCLE high for read cycle. 2. All read cycle timing is referenced from the last valid address to the first transition address and t are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V ...

Page 7

... K6R1008V1B-C/B-L, K6R1008V1B-I/B-P TIMING WAVEFORM OF WRITE CYCLE(2) Address CS WE High-Z Data in Data out TIMING WAVEFORM OF WRITE CYCLE(3) Address CS WE High-Z Data in High-Z Data out NOTES(WRITE CYCLE) 1. All write cycle timing is referenced from the last valid address to the first transition address write occurs during the overlap of a low CS and WE. A write begins at the latest transition CS going low and WE going low ; ...

Page 8

... K6R1008V1B-C/B-L, K6R1008V1B-I/B-P FUNCTIONAL DESCRIPTION means Don t Care. DATA RETENTION CHARACTERISTICS* Parameter V for Data Retention CC Data Retention Current Data Retention Set-Up Time Recovery Time * The above parameters are also guaranteed at industrial temperature range. Data Retention Characteristic is for L-ver only. ...

Page 9

... K6R1008V1B-C/B-L, K6R1008V1B-I/B-P PACKAGE DIMENSIONS 32-SOJ-400 #32 11.18 0.12 0.440 0.005 #1 +0.10 0.43 -0.05 0. +0.004 0.017 0.0375 -0.002 32-TSOP2-400CF #32 #1 21.35 0.841 20.95 0.825 0.95 0.40 0. 0.037 0.016 0.004 #17 #16 21.36 MAX 0.841 20.95 0.12 0.825 0.005 1.30 ( 0.051 1.30 ( 0.051 +0.10 0.71 -0.05 1.27 +0.004 0.028 0.050 -0.002 #17 11.76 0.20 0.463 0.008 #16 MAX 0.10 0.004 1.00 0.10 0.039 0.047 0.004 1.27 0.05 MIN 0.050 0.002 - 9 - Preliminary PRELIMINARY ...