adv473 Analog Devices, Inc., adv473 Datasheet - Page 8

• Manufacturer Part Number: adv473
• Description: Cmos 135 Mhz True-color Graphics Triple 8-bit Video Ram-dac
• Manufacturer: Analog Devices, Inc.

ADV473
Command Register (CR)
The ADV473 has an internal command register (CR). This reg-
ister is 8 bits wide, CR0–CR7 and is directly mapped to the
MPU data bus on the part, D0–D7. The command register can
be written to or read from. It is not initialized, therefore it must
be set. Figure 4 shows what each bit of the CR register controls
and shows the values it must be programmed to for various
modes of operation.
OL3–OL0
1111
.
.
0001
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
X = Don’t Care
S1, S0
XX
.
.
XX
00
00
00
00
01
01
01
01
10
10
10
10
11
11
11
11
CR7, CR6
XX
.
.
XX
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
CR7
COLOR MODE
(SEE TABLE III)
SELECT
CR5
PEDESTAL ENABLE
0
1
CONTROL (SETUP)
CR6
0 IRE
7.5 IRE
Mode
Overlay Color 15
.
.
Overlay Color 1
24-Bit True-Color
24-Bit True-Color
24-Bit True-Color
Reserved
24-Bit True-Color Bypass
24-Bit True-Color Bypass
24-Bit True-Color Bypass
Reserved
8-Bit Pseudo-Color (Red)
8-Bit Pseudo-Color (Green)
8-Bit Pseudo-Color (Blue)
15-Bit True-Color
8-Bit True-Color Bypass (Red)
8-Bit True-Color Bypass (Green)
8-Bit True-Color Bypass (Blue)
15-Bit True-Color Bypass
CR5
Figure 4. Command Register (CR)
Table III. Color Operation Modes
CR4
0
1
COLOR SELECT
8-BIT/6-BIT
6-BIT
8-BIT
CR4
–8–
Color Modes
The ADV473 supports four color modes, 24-bit true-color,
15-bit true-color, 8-bit true-color and 8-bit pseudo-color. The
mode of operation is determined by the S0 and S1 inputs, in
conjunction with CR7 and CR6 of the command register. S0
and S1 are pipelined to maintain synchronization with the video
data. Table III illustrates the modes of operation.
CR3
THESE BITS ARE OUTPUT
ONTO THE CR3-CR0 PINS
CONTROL OUTPUTS
CR2
R7–R0
XXH
.
.
XXH
R7–R0
R7–R0
R7–R0
Reserved
R7–R0
R7–R0
R7–R0
Reserved
P7–P0
Ignored
Ignored
Orrrrrgg
Orrrrrgg
rrrgggbb
Ignored
Ignored
CR1
G7–G0
XXH
.
.
XXH
G7–G0
G7–G0
G7–G0
Reserved
G7–G0
G7–G0
G7–G0
Reserved
Ignored
P7–P0
Ignored
gggbbbbb
Ignored
gggbbbbb
rrrgggbb
Ignored
CR0
B7–B0
XXH
.
.
XXH
B7–B0
B7–B0
B7–B0
Reserved
B7–B0
B7–B0
B7–B0
Reserved
Ignored
Ignored
P7–P0
Ignored
Ignored
Ignored
rrrgggbb
Ignored
REV. A