cym1841c ETC-unknow, cym1841c Datasheet

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cym1841c

Manufacturer Part Number
cym1841c
Description
256k X 32 Static Ram Module
Manufacturer
ETC-unknow
Datasheet
Features
Functional Description
The CYM1841A/1841C are high-performance 8-megabit stat-
ic RAM modules organized as 256K words by 32 bits. This
module is constructed from eight 256K x 4 SRAMs in SOJ
packages mounted on an epoxy laminate board with pins. Four
chip selects (CS
enable the four bytes. Reading or writing can be executed on
Cypress Semiconductor Corporation
• High-density 8-megabit SRAM module
• 32-bit standard footprint supports densities from 16K
• High-speed CMOS SRAMs
• Low active power
• SMD technology
• TTL-compatible inputs and outputs
• Low profile
• Available in ZIP, SIMM, and angled SIMM footprint
• 72-pin SIMM version compatible with 1M x 32
Logic Block Diagram
x 32 through 1M x 32
(CYM1851)
— Access time of 12 ns
— 5.3W (max.) at 25 ns
— Max. height of 0.58 in.
1
, CS
2
, CS
A
0
–A
CS
CS
CS
CS
3
WE
OE
, CS
17
1
2
3
4
4
) are used to independently
18
256K x 4
256K x 4
256K x 4
256K x 4
3901 North First Street
SRAM
SRAM
SRAM
SRAM
4
4
4
4
I/O
I/O
I/O
I/O
0
8
16
24
– I/O
– I/O
– I/O
– I/O
individual bytes or any combination of multiple bytes through
proper use of selects.
Writing to each byte is accomplished when the appropriate
chip select (CS) and write enable (WE) inputs are both LOW.
Data on the input/output pins (I/O) is written into the mem-
ory location specified on the address pins (A
Reading the device is accomplished by taking the chip select
(CS) LOW while write enable (WE) remains HIGH. Under
these conditions, the contents of the memory location speci-
fied on the address pins will appear on the data input/output
pins (I/O).
The data input/output pins stay at the high-impedance state
when write enable is LOW or the appropriate chip selects are
HIGH.
Two pins (PD
ory density in applications where alternate versions of the
JEDEC-standard modules can be interchanged.
The CYM1841A and CYM1841C are 100% pin, package, and
electrically identical. The CYM1841A utilizes corner power
and ground SRAMs, the CYM1841C utilizes center power and
ground SRAMs.
A 72-pin SIMM is offered for compatibility with the 1M x 32
CYM1851. This version is socket upgradable to the CYM1851.
Both the 64-pin and 72-pin SIMM modules are available with
either tin-lead or 10 micro-inches of gold flash on the edge
contacts.
256K x 32 Static RAM Module
3
11
19
27
San Jose
0
September 1989 – Revised December 10, 1997
and PD
256K x 4
256K x 4
256K x 4
256K x 4
PD
PD
PD
PD
SRAM
SRAM
SRAM
SRAM
0
1
2
3
– GND
– GND
– OPEN (72-pin only)
– OPEN (72-pin only)
1841A–1
1
) are used to identify module mem-
4
4
4
4
CA 95134
I/O
I/O
I/O
I/O
4
12
20
28
– I/O
– I/O
– I/O
– I/O
7
15
23
31
CYM1841A
CYM1841C
fax id: 2017
0
408-943-2600
through A
17
).

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cym1841c Summary of contents

Page 1

... PD 0 ory density in applications where alternate versions of the JEDEC-standard modules can be interchanged. The CYM1841A and CYM1841C are 100% pin, package, and electrically identical. The CYM1841A utilizes corner power and ground SRAMs, the CYM1841C utilizes center power and ground SRAMs. A 72-pin SIMM is offered for compatibility with the CYM1851 ...

Page 2

... GND A 1841A– CYM1841A CYM1841C 1841A-25 1841A-35 1841C-25 1841C- 960 960 480 480 72-Pin SIMM GND I/O 15 ...

Page 3

... V < 0.2V IN Test Conditions [ MHz 5.0V CC R1481 5V 3.0V R2 GND 255 5 pF INCLUDING JIG AND 1841A–4 SCOPE (b) 1.73V 3 CYM1841A CYM1841C 0.5V to +7.0V ..................................................... – 0.5V to +7.0V ................................................. – Ambient Temperature + 1841A-20 1841A-25, 35 1841C-20 1841C-25, 35 Max. Min. Max. Min. Max. 2.4 2.4 0.4 0 ...

Page 4

... These parameters are guaranteed by design and not 100% tested. HZCS LZCS 4 CYM1841A CYM1841C 1841A-20 1841A-25 1841C-20 1841C-25 Min. Max. Min. Max ...

Page 5

... Min. Max. Min CYM1841A CYM1841C Max. Unit ...

Page 6

... Address valid prior to or coincident with CS transition LOW OHA ACS t DOE t LZOE SCS PWE t DATA VALID t HZWE and OE CYM1841A CYM1841C DATA VALID t HZOE t HZCS IMPEDANCE DATA VALID LZWE HIGH IMPEDANCE 1841A–6 HIGH 1841A–7 1841A–8 ...

Page 7

... If CS goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Truth Table Input/Output High Data Out Data High PWE DATA VALID t HZWE Mode Deselect/Power-Down Read Write Deselect 7 CYM1841A CYM1841C t SCS HIGH IMPEDANCE 1841A–9 ...

Page 8

... Plastic Angled SIMM Module 72-Pin Plastic Angled SIMM Module (gold contacts) 72-Pin Plastic SIMM Module 72-Pin Plastic SIMM Module (gold contacts) 64-Pin Plastic Angled SIMM Module 64-Pin Plastic ZIP Module 64-Pin Plastic ZIP Module 8 CYM1841A CYM1841C Operating Range Commercial Commercial Commercial Commercial Commercial ...

Page 9

... R + .001 TYP 0.250 3.35 (64 PINS) 64-Pin Plastic SIMM Module PM02 3.845 3.855 3.580 3.588 0.050 0. TYP 0.250 3.348 (64 PINS) 3.352 9 CYM1841A CYM1841C Operating Range Commercial 0.525 MAX 0.145 REF PIN 64 0.585 0.595 0.135 REF .001 PIN 64 0.330 MAX 0.350 MAX ...

Page 10

... PIN1 .075/.085 .245/.255 72-Pin Plastic SIMM Module PM04 64-Pin Plastic Angled SIMM Module PN02 3.845/3.855 3.580/3.588 .061/.063R .050TYP .249/.251 3.348/3.352 72-Pin Plastic Angled SIMM Module PN04 10 CYM1841A CYM1841C .350MAX .670/.680 .220REF ...

Page 11

... Plastic ZIP Module PZ01 Bottom View 3.640 3.660 0.250 TYP 64-Pin Plastic ZIP Module PZ03 Bottom View 3.640 3.660 0.250 0.015 TYP 0.025 CYM1841A CYM1841C 0.330 MAX 0.500 MAX 0.008 0.014 0.100 0.050 TYP TYP 0.100 TYP DIMENSIONS IN INCHES MIN. ...

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