htsich56 NXP Semiconductors, htsich56 Datasheet - Page 5
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htsich56
Manufacturer Part Number
htsich56
Description
Hitag S Transponder Ic
Manufacturer
NXP Semiconductors
Datasheet
1.HTSICH56.pdf
(21 pages)
NXP Semiconductors
7. Functional description
HTSICH56_48_SDS
Product short data sheet
COMPANY PUBLIC
7.1 Memory organization
7.2 HITAG S plain mode
The EEPROM has a capacity up to 2048 bit and is organized in 16 Blocks, consisting of
4 Pages each, for commands with Block access. A Page consists of 4 Bytes each (1 Page
= 32 Bits) and is the smallest access unit.
Addressing is done Page by Page (Page 0 to 63) and access is gained either Page by
Page or Block by Block entering the respective Page start address. In case of Block
Read/Write access, the transponder is processed from the start Page address within one
block to the end of the corresponding block.
Two different types of HITAG S IC’s with different memory sizes as shown in the figure
above are available.
Table 3.
page address
0x00
Fig 2.
Block 0
Block 1
Block 2
Block 3
Block 15
Memory organization
Memory map for HITAG S in plain mode
All information provided in this document is subject to legal disclaimers.
Address
Page
0x0B
0x0C
0x0D
0x0E
0x3B
0x3C
0x3D
0x3E
0x0A
0x0F
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x10
0x3F
MSByte
MSB
Rev. 3.0 — 12 October 2011
UID3
210330
LSB MSB
page 10
page 12
page 13
page 14
page 15
page 16
page 59
page 60
page 61
page 62
page 11
page 63
page 0
page 1
page 2
page 3
page 4
page 5
page 6
page 7
page 8
page 9
32 bit
HTSICH56; HTSICH48
UID2
LSB MSB
UID1
HITAG S transponder IC
HITAG S Type
LSB MSB
H56
© NXP B.V. 2011. All rights reserved.
LSByte
aaa-000830
H48
UID0
5 of 21
LSB