ucn5890 Allegro MicroSystems, Inc., ucn5890 Datasheet - Page 4

• Manufacturer Part Number: ucn5890
• Description: Bimos Ii 8-bit Serial-input, Latched Source Drivers
• Manufacturer: Allegro MicroSystems, Inc.

A. Minimum Data Active Time Before Clock Pulse
B. Minimum Data Active Time After Clock Pulse
C. Minimum Data Pulse Width ................................................................ 150 ns
D. Minimum Clock Pulse Width ............................................................... 150 ns
E. Minimum Time Between Clock Activation and Strobe ....................... 300 ns
F. Minimum Strobe Pulse Width ............................................................. 100 ns
G. Typical Time Between Strobe Activation and
Timing is representative of a 3.3 MHz clock. Higher speeds may be attainable
with increased supply voltage; operation at high temperatures will reduce the
specified maximum clock frequency.
L = Low Logic Level
BLANKING
Serial
Data
Input Input I
H
L
X
5890
8-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
STROBE
DATA IN
CLOCK
(Data Set-Up Time) .......................................................................... 75 ns
(Data Hold Time) ............................................................................. 75 ns
Output Transistion ......................................................................... 500 ns
(T
OUT
Clock
A
= +25 C,V
N
AND
H
L
R
X
P
1
1
1
Shift Register Contents
5891
I
R
R
R
X
P
H = High Logic Level
2
A
2
1
1
2
DD
C
I
R
R
R
X
P
3
B
3
2
2
3
= 5 V, Logic Levels are V
...
...
...
...
...
...
D
E
I
R
R
R
X
P
N-1
N-1
N-2
N-2
N-1
I
R
R
R
X
P
X
F
N
N
N-1
N-1
N
X = Irrelevant
G
Output
Serial
Data
R
R
R
X
P
X
N
N-1
N-1
N
DD
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
Strobe
P = Present State
Input
and Ground)
H
X
L
Dwg. No. A-12,649A
I
R
P
...
1
1
1
Latch Contents
I
R
P
X
2
2
2
R = Previous State
I
R
P
X
3
3
3
...
...
...
H
I
R
P
L
N-1
N-1
N-1
P
R
I
L
N
N
N
Output
Enable
L
L
I
P
... L
1
1
Output Contents
I
P
2
2
I
P
3
3
L
... I
... P
N-1
N-1
I
P
N
N