npe405h Applied Micro Circuits Corporation (AMCC), npe405h Datasheet - Page 11

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npe405h

Manufacturer Part Number
npe405h
Description
Powernp Npe405h Embedded Processor
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet
NPe405H – PowerNP NPe405H Embedded Processor
DMA CONTROLLER
SERIAL INTERFACE
IIC BUS INTERFACE
IIC EEPROM CONTROLLER
Supports setting of processor configuration from serial EEPROM during system reset.
AMCC Proprietary
Supports the following transfers:
- Memory-to-memory transfers
- Buffered peripheral to memory transfers
- Buffered memory to peripheral transfers
Four channels
Scatter/Gather capability for programming multiple DMA operations
8-, 16-, 32-bit peripheral support (OPB and external bus attached)
32-bit addressing
Address increment or decrement
Internal 32-byte data buffering capability
Supports internal and external peripherals
Support for memory mapped peripherals
Support for peripherals running on slower frequency buses
Two 8-pin UART interfaces provided
Selectable internal or external serial clock to allow wide range of baud rates
Register compatibility with NS16550 register set
Complete status reporting capability
Transmitter and receiver are each buffered with 16-byte FIFOs when in FIFO mode
Fully programmable serial-interface characteristics
Supports DMA using internal DMA engine
Compliant with Phillips® Semiconductors I
Operation at 100kHz or 400kHz
8-bit data
10- or 7-bit address
Slave transmitter and receiver
Master transmitter and receiver
Multiple bus masters
Supports fixed V
Two independent 4 x 1 byte data buffers
One programmable interrupt request signal
Provides full management of all IIC bus protocol
Programmable error recovery
DD
IIC interface
2
C Specification, dated 1995
Revision 1.02 – November 16, 2007
Data Sheet
DS2011
11

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