saa569x NXP Semiconductors, saa569x Datasheet - Page 51

• Manufacturer Part Number: saa569x
• Description: Enhanced Tv Microcontrollers With On-screen Display Osd
• Manufacturer: NXP Semiconductors

Philips Semiconductors
21 MEMORY INTERFACE
The memory interface controls access to the embedded
DRAM, refreshing of the DRAM and page clearing. The
DRAM is shared between Data Capture, display and
microcontroller sections.
The Data Capture section uses the DRAM to store
acquired information that has been requested. The display
reads from the DRAM information and converts it to RGB
values. The microcontroller uses the DRAM as embedded
auxiliary RAM.
21.1
The memory is partitioned into two distinct areas, the
dedicated Auxiliary RAM area and the Display RAM area.
When not being used for Data Capture or display, the
Display RAM area can be used as an extension to the
auxiliary RAM area.
21.1.1
The Auxiliary RAM is not initialised at power-up and must
be initialised by the application software. Its contents are
maintained during Idle mode and Standby mode, but are
lost if Power-down mode is entered.
21.1.2
The Display RAM is initialised on power-up to a value
of 20H throughout. The contents of the Display RAM are
maintained when entering Idle mode. If Idle mode is exited
using an interrupt, the contents are unchanged; if Idle
mode is exited using an external reset, the contents are
initialised to 20H.
Full Closed Caption display requires display RAM from
8000H to 845FH. The memory from 8460H to 84FFH
(must be initialised by the application software) can be
utilised as an extension to the dedicated contiguous
Auxiliary RAM that occupies 0000H to 07FFH.
21.2
The dedicated auxiliary RAM area occupies 2 kbytes, with
an address range from 0000H to 07FFH. The Display
RAM occupies a maximum of 12 kbytes with an address
range from 2000H to 5000H for TXT mode and
8000H to 84FFH for CC mode (see Fig.15). Although
having different address ranges, the two modes occupy
physically the same DRAM area.
2002 May 06
Enhanced TV microcontrollers with
On-Screen Display (OSD)
Memory structure
Memory mapping
A
D
UXILIARY
ISPLAY
RAM
RAM
51
21.3
The SAA567x; SAA569x incorporates a CCBASE SFR,
which enables CC Display data to be accessed from any
1-kbyte partition within the Display memory. This SFR
allows the CC Base address for Closed Caption Display
memory to overlap Teletext memory at the following
hexadecimal boundaries of the 80C51 microcontroller
‘MOVX’ address space:
2000H (same as SAA55x default), 2400H, 2800H, 2C00H,
3000H, 3400H, 3800H, 3C00H, 4000H, 4400H, 4800H,
4C00H, 5000H, 5400H, 5800H, 5C00H, 6000H, 6400H,
6800H and 6C00H.
The reset value for the CCBASE Address SFR is 20H, thus
ensuring software compatibility with other variants in the
SAA55xx family. Register bits CCBASE1 and CCBASE0
must always be set to zero at 1 kbyte boundaries.
Figure 15 shows the default setting for the CC Display
memory.
handbook, halfpage
lower 32 kbytes
CCBASE SFR
TXT BLOCK 19
TXT BLOCK 10
TXT BLOCK 8
TXT BLOCK 7
TXT BLOCK 6
TXT BLOCK 5
TXT BLOCK 4
TXT BLOCK 3
TXT BLOCK 2
TXT BLOCK 1
TXT BLOCK 9
TXT BLOCK 0
AUXILIARY
Fig.15 DRAM memory mapping.
7FFFH
5000H
4C00H
4800H
4400H
4000H
3C00H
3800H
3400H
3000H
2C00H
2800H
2400H
2000H
0800H
0000H
SAA567x; SAA569x
upper 32 kbytes
CC DISPLAY
Objective specification
GSA061
8000H
FFFFH
84FFH