saa5244a NXP Semiconductors, saa5244a Datasheet - Page 19

• Manufacturer Part Number: saa5244a
• Description: Integrated Teletext Decoder Ivt1.1
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Register maps
SAA5244A mode registers R0 to R11 are shown in Table 2. R0 to R10 are WRITE only; R11 is READ/WRITE.
Register map (R3), for page requests, is shown in detail in Table 3.
Table 2 Register map
Notes to Table 2
1. ‘ ‘ indicates these bits are inactive and must be written to logic 0 for future compatibility.
2. All bits in registers R0 to R10 are cleared to logic 0 on power-up except bits D0 to D1 of registers R1, R5 and R6
3. All memory is cleared to ‘space’ (00100000) on power-up, except row 0 column 7 chapter 0, which is ‘alpha’ white
4. TB must be set to logic 0 for normal operation.
5. The I
March 1992
Adv.
control
Mode
Page
request
address
Page
request
data
Display
control
(normal)
Display
control
(newsflash
/subtitle)
Display
mode
Cursor
row
Cursor
column
Cursor
data
Device
status
Integrated VIP and teletext decoder
(IVT1.1)
which are set to logic 1.
(00000111) as the acquisition circuit is enabled but the page is on hold.
REGISTER
2
C slave address is 0010001
0
1
2
3
5
6
7
9
10
11
11B
X24
POS
VCS TO
SCS
BKGND
OUT
BKGND
OUT
STATUS
TOP
SUPPL.
BLAST
SUPPL.
ROW 24
625/525
SYNC
D7
FREE
RUN PLL
BKGND
IN
BKGND
IN
CURSOR
ON
CLEAR
MEM.
SUPPL.
ROW 0
D6
ROM
VER R4
D6
AUTO
ODD/
EVEN
ACQ
ON/OFF
COR
OUT
COR
OUT
REVEAL
ON
A0
C5
D5
ROM
VER R3
D5
19
DISABLE
HDR
ROLL
PRD4
COR
IN
COR
IN
BOTTOM
HALF
R4
C4
D4
ROM
VER R2
D4
DEW/
FULL
FIELD
TB
PRD3
TEXT
OUT
TEXT
OUT
DOUBLE
HEIGHT
R3
C3
D3
ROM
VER R1
D3
DISABLE
ODD/
EVEN
TCS
ON
START
COLUMN
SC2
PRD2
TEXT
IN
TEXT
IN
BOX
24
R2
C2
D2
ROM
VER R0
D2
T1
START
COLUMN
SC1
PRD1
PON
OUT
PON
OUT
BOX
1-23
R1
C1
D1
TEXT
SIGNAL
QUALITY
Product specification
D1
SAA5244A
R11/R11B
SELECT
T0
START
COLUMN
SC0
PRD0
PON
IN
PON
IN
BOX
0
R0
C0
D0
VCS
SIGNAL
QUALITY
D0