mt16jss51264hy-1g1 Micron Semiconductor Products, mt16jss51264hy-1g1 Datasheet - Page 12

• Manufacturer Part Number: mt16jss51264hy-1g1
• Description: 4gb X64, Dr 204-pin Ddr3 Sdram Sodimm
• Manufacturer: Micron Semiconductor Products

SM Bus Slave Subaddress Decoding
Figure 3:
PDF: 09005aef832ed836/Source: 09005aef832ed8fb
JSS16C512x64H.fm - Rev. A 5/08 EN
critical temperature only mode
Alarm window (MAX)
Alarm window (MIN)
EVENT# Pin Functionality
comparator mode
interrupt mode
EVENT#
EVENT#
EVENT#
Critical
The interrupt mode enables software to reset EVENT# after a critical temperature
threshold has been detected. Threshold points are set in the configuration register by the
user. This mode triggers the critical temperature limit and both the MIN and MAX of the
temperature window.
The compare mode is similar to the interrupt mode, except EVENT# cannot be reset by
the user and only returns to the logic HIGH state when the temperature falls below the
programmed thresholds.
Critical temperature mode triggers EVENT# only when the temperature has exceeded
the programmed critical trip point. When the critical trip point has been reached, the
temperature sensor goes into comparator mode, and the critical EVENT# cannot be
cleared through software.
The temperature sensor’s physical address differs from the SPD EEPROM’s physical
address: 0011 for A0, A1, A2, and RW# in binary where A2, A1, and A0 are the three slave
subaddress pins and the RW# bit is the READ/WRITE flag.
If the slave base address is fixed for the temperature sensor/SPD EEPROM, then the pins
set the subaddress bits of the slave address, enabling the devices to be located anywhere
within the eight slave address locations. For example, they could be set from 30h to 3Eh.
Temperature
Clears event
4GB (x64, DR) 204-Pin DDR3 SDRAM SODIMM
12
Hysteresis affects
these trip points
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Electrical Specifications
©2008 Micron Technology, Inc. All rights reserved
Time